]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/commitdiff
brcmfmac: support chipsets with different core enumeration space
authorArend van Spriel <arend.vanspriel@broadcom.com>
Wed, 28 Jul 2021 20:50:34 +0000 (22:50 +0200)
committerKalle Valo <kvalo@codeaurora.org>
Sat, 21 Aug 2021 15:49:05 +0000 (18:49 +0300)
Historically the broadcom wifi chipsets always had enumeration
space containing all core information at same place. However, for
new chipsets the ASIC developers moved away from that given fact.
So we have to accommodate that it can differ per chipset.

Reviewed-by: Hante Meuleman <hante.meuleman@broadcom.com>
Reviewed-by: Pieter-Paul Giesberts <pieter-paul.giesberts@broadcom.com>
Reviewed-by: Franky Lin <franky.lin@broadcom.com>
Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/1627505434-9544-5-git-send-email-arend.vanspriel@broadcom.com
drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.h
drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
drivers/net/wireless/broadcom/brcm80211/include/soc.h

index 633d0ab190314bfb84178d9f4a37fdeed19feb05..720c7fec22acb3936382b655ef5ad707d81ab696 100644 (file)
@@ -128,7 +128,8 @@ int brcmf_sdiod_intr_register(struct brcmf_sdio_dev *sdiodev)
 
                if (sdiodev->bus_if->chip == BRCM_CC_43362_CHIP_ID) {
                        /* assign GPIO to SDIO core */
-                       addr = CORE_CC_REG(SI_ENUM_BASE, gpiocontrol);
+                       addr = brcmf_chip_enum_base(sdiodev->func1->device);
+                       addr = CORE_CC_REG(addr, gpiocontrol);
                        gpiocontrol = brcmf_sdiod_readl(sdiodev, addr, &ret);
                        gpiocontrol |= 0x2;
                        brcmf_sdiod_writel(sdiodev, addr, gpiocontrol, &ret);
index da4fd40b5275d37cd0417322ba26506174939ebc..4faab0170ffa31e39e574b36e95a88fa3b50be88 100644 (file)
@@ -896,7 +896,8 @@ int brcmf_chip_dmp_erom_scan(struct brcmf_chip_priv *ci)
        u32 base, wrap;
        int err;
 
-       eromaddr = ci->ops->read32(ci->ctx, CORE_CC_REG(SI_ENUM_BASE, eromptr));
+       eromaddr = ci->ops->read32(ci->ctx,
+                                  CORE_CC_REG(ci->pub.enum_base, eromptr));
 
        while (desc_type != DMP_DESC_EOT) {
                val = brcmf_chip_dmp_get_desc(ci, &eromaddr, &desc_type);
@@ -944,6 +945,11 @@ int brcmf_chip_dmp_erom_scan(struct brcmf_chip_priv *ci)
        return 0;
 }
 
+u32 brcmf_chip_enum_base(u16 devid)
+{
+       return SI_ENUM_BASE_DEFAULT;
+}
+
 static int brcmf_chip_recognition(struct brcmf_chip_priv *ci)
 {
        struct brcmf_core *core;
@@ -956,7 +962,8 @@ static int brcmf_chip_recognition(struct brcmf_chip_priv *ci)
         * For different chiptypes or old sdio hosts w/o chipcommon,
         * other ways of recognition should be added here.
         */
-       regdata = ci->ops->read32(ci->ctx, CORE_CC_REG(SI_ENUM_BASE, chipid));
+       regdata = ci->ops->read32(ci->ctx,
+                                 CORE_CC_REG(ci->pub.enum_base, chipid));
        ci->pub.chip = regdata & CID_ID_MASK;
        ci->pub.chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT;
        socitype = (regdata & CID_TYPE_MASK) >> CID_TYPE_SHIFT;
@@ -976,7 +983,7 @@ static int brcmf_chip_recognition(struct brcmf_chip_priv *ci)
                ci->resetcore = brcmf_chip_sb_resetcore;
 
                core = brcmf_chip_add_core(ci, BCMA_CORE_CHIPCOMMON,
-                                          SI_ENUM_BASE, 0);
+                                          SI_ENUM_BASE_DEFAULT, 0);
                brcmf_chip_sb_corerev(ci, core);
                core = brcmf_chip_add_core(ci, BCMA_CORE_SDIO_DEV,
                                           BCM4329_CORE_BUS_BASE, 0);
@@ -1090,7 +1097,7 @@ static int brcmf_chip_setup(struct brcmf_chip_priv *chip)
        return ret;
 }
 
-struct brcmf_chip *brcmf_chip_attach(void *ctx,
+struct brcmf_chip *brcmf_chip_attach(void *ctx, u16 devid,
                                     const struct brcmf_buscore_ops *ops)
 {
        struct brcmf_chip_priv *chip;
@@ -1115,6 +1122,7 @@ struct brcmf_chip *brcmf_chip_attach(void *ctx,
        chip->num_cores = 0;
        chip->ops = ops;
        chip->ctx = ctx;
+       chip->pub.enum_base = brcmf_chip_enum_base(devid);
 
        err = ops->prepare(ctx);
        if (err < 0)
index 8fa38658e727acc88a5f1213ddb6a83f7d521ad8..d69f101f583449f3213b416e4db34cde8fd967ea 100644 (file)
@@ -15,6 +15,7 @@
  *
  * @chip: chip identifier.
  * @chiprev: chip revision.
+ * @enum_base: base address of core enumeration space.
  * @cc_caps: chipcommon core capabilities.
  * @cc_caps_ext: chipcommon core extended capabilities.
  * @pmucaps: PMU capabilities.
@@ -27,6 +28,7 @@
 struct brcmf_chip {
        u32 chip;
        u32 chiprev;
+       u32 enum_base;
        u32 cc_caps;
        u32 cc_caps_ext;
        u32 pmucaps;
@@ -70,7 +72,7 @@ struct brcmf_buscore_ops {
 };
 
 int brcmf_chip_get_raminfo(struct brcmf_chip *pub);
-struct brcmf_chip *brcmf_chip_attach(void *ctx,
+struct brcmf_chip *brcmf_chip_attach(void *ctx, u16 devid,
                                     const struct brcmf_buscore_ops *ops);
 void brcmf_chip_detach(struct brcmf_chip *chip);
 struct brcmf_core *brcmf_chip_get_core(struct brcmf_chip *chip, u16 coreid);
@@ -85,5 +87,6 @@ void brcmf_chip_set_passive(struct brcmf_chip *ci);
 bool brcmf_chip_set_active(struct brcmf_chip *ci, u32 rstvec);
 bool brcmf_chip_sr_capable(struct brcmf_chip *pub);
 char *brcmf_chip_name(u32 chipid, u32 chiprev, char *buf, uint len);
+u32 brcmf_chip_enum_base(u16 devid);
 
 #endif /* BRCMF_AXIDMP_H */
index c49dd0c36ae433f311e13e1d29b2df9aff06217f..5f6a418fbbb158d837ce0959c9e2af3fcfb03341 100644 (file)
@@ -1886,7 +1886,8 @@ brcmf_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 
        devinfo->pdev = pdev;
        pcie_bus_dev = NULL;
-       devinfo->ci = brcmf_chip_attach(devinfo, &brcmf_pcie_buscore_ops);
+       devinfo->ci = brcmf_chip_attach(devinfo, pdev->device,
+                                       &brcmf_pcie_buscore_ops);
        if (IS_ERR(devinfo->ci)) {
                ret = PTR_ERR(devinfo->ci);
                devinfo->ci = NULL;
index 1d1b0b7d8d9b3c5494f9a1d30e2bb0b9e1aa03fc..ded750b797848ab3b131313b817b88901f1f3396 100644 (file)
@@ -3910,7 +3910,7 @@ static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
         * It can be identified as 4339 by looking at the chip revision. It
         * is corrected here so the chip.c module has the right info.
         */
-       if (addr == CORE_CC_REG(SI_ENUM_BASE, chipid) &&
+       if (addr == CORE_CC_REG(SI_ENUM_BASE_DEFAULT, chipid) &&
            (sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4339 ||
             sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4335_4339)) {
                rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
@@ -3946,12 +3946,15 @@ brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
        int reg_addr;
        u32 reg_val;
        u32 drivestrength;
+       u32 enum_base;
 
        sdiodev = bus->sdiodev;
        sdio_claim_host(sdiodev->func1);
 
-       pr_debug("F1 signature read @0x18000000=0x%4x\n",
-                brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
+       enum_base = brcmf_chip_enum_base(sdiodev->func1->device);
+
+       pr_debug("F1 signature read @0x%08x=0x%4x\n", enum_base,
+                brcmf_sdiod_readl(sdiodev, enum_base, NULL));
 
        /*
         * Force PLL off until brcmf_chip_attach()
@@ -3970,7 +3973,8 @@ brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
                goto fail;
        }
 
-       bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
+       bus->ci = brcmf_chip_attach(sdiodev, sdiodev->func1->device,
+                                   &brcmf_sdio_buscore_ops);
        if (IS_ERR(bus->ci)) {
                brcmf_err("brcmf_chip_attach failed!\n");
                bus->ci = NULL;
index 92d942b44f2c20186051737646a8ee699492123f..8249211913660bbafe8304f878ae9c76a36782ec 100644 (file)
@@ -6,7 +6,7 @@
 #ifndef        _BRCM_SOC_H
 #define        _BRCM_SOC_H
 
-#define SI_ENUM_BASE           0x18000000      /* Enumeration space base */
+#define SI_ENUM_BASE_DEFAULT   0x18000000
 
 /* Common core control flags */
 #define        SICF_BIST_EN            0x8000