]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
tty: serial: fsl_lpuart: Use appropriate lpuart32_* I/O funcs
authorAndrey Smirnov <andrew.smirnov@gmail.com>
Mon, 29 Jul 2019 19:52:15 +0000 (12:52 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 4 Sep 2019 10:43:48 +0000 (12:43 +0200)
When dealing with 32-bit variant of LPUART IP block appropriate I/O
helpers have to be used to properly deal with endianness
differences. Change all of the offending code to do that.

Fixes: a5fa2660d787 ("tty/serial/fsl_lpuart: Add CONSOLE_POLL support
for lpuart32.")
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Cory Tusar <cory.tusar@zii.aero>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: linux-imx@nxp.com
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Link: https://lore.kernel.org/r/20190729195226.8862-14-andrew.smirnov@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/fsl_lpuart.c

index a0f38d7caa76f6f9891dd3e127673711caad85ef..395df8c7e1d551262a6c0cf08e03ce5b880868d1 100644 (file)
@@ -617,26 +617,26 @@ static int lpuart32_poll_init(struct uart_port *port)
        spin_lock_irqsave(&sport->port.lock, flags);
 
        /* Disable Rx & Tx */
-       writel(0, sport->port.membase + UARTCTRL);
+       lpuart32_write(&sport->port, UARTCTRL, 0);
 
-       temp = readl(sport->port.membase + UARTFIFO);
+       temp = lpuart32_read(&sport->port, UARTFIFO);
 
        /* Enable Rx and Tx FIFO */
-       writel(temp | UARTFIFO_RXFE | UARTFIFO_TXFE,
-                  sport->port.membase + UARTFIFO);
+       lpuart32_write(&sport->port, UARTFIFO,
+                      temp | UARTFIFO_RXFE | UARTFIFO_TXFE);
 
        /* flush Tx and Rx FIFO */
-       writel(UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH,
-                       sport->port.membase + UARTFIFO);
+       lpuart32_write(&sport->port, UARTFIFO,
+                      UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH);
 
        /* explicitly clear RDRF */
-       if (readl(sport->port.membase + UARTSTAT) & UARTSTAT_RDRF) {
-               readl(sport->port.membase + UARTDATA);
-               writel(UARTFIFO_RXUF, sport->port.membase + UARTFIFO);
+       if (lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_RDRF) {
+               lpuart32_read(&sport->port, UARTDATA);
+               lpuart32_write(&sport->port, UARTFIFO, UARTFIFO_RXUF);
        }
 
        /* Enable Rx and Tx */
-       writel(UARTCTRL_RE | UARTCTRL_TE, sport->port.membase + UARTCTRL);
+       lpuart32_write(&sport->port, UARTCTRL, UARTCTRL_RE | UARTCTRL_TE);
        spin_unlock_irqrestore(&sport->port.lock, flags);
 
        return 0;
@@ -644,18 +644,18 @@ static int lpuart32_poll_init(struct uart_port *port)
 
 static void lpuart32_poll_put_char(struct uart_port *port, unsigned char c)
 {
-       while (!(readl(port->membase + UARTSTAT) & UARTSTAT_TDRE))
+       while (!(lpuart32_read(port, UARTSTAT) & UARTSTAT_TDRE))
                barrier();
 
-       writel(c, port->membase + UARTDATA);
+       lpuart32_write(port, UARTDATA, c);
 }
 
 static int lpuart32_poll_get_char(struct uart_port *port)
 {
-       if (!(readl(port->membase + UARTSTAT) & UARTSTAT_RDRF))
+       if (!(lpuart32_read(port, UARTSTAT) & UARTSTAT_RDRF))
                return NO_POLL_CHAR;
 
-       return readl(port->membase + UARTDATA);
+       return lpuart32_read(port, UARTDATA);
 }
 #endif