]> git.proxmox.com Git - mirror_ubuntu-focal-kernel.git/commitdiff
clk: imx8mq: Add support for the CLKO1 clock
authorFabio Estevam <festevam@gmail.com>
Thu, 31 Jan 2019 00:20:56 +0000 (22:20 -0200)
committerStephen Boyd <sboyd@kernel.org>
Thu, 21 Feb 2019 20:56:52 +0000 (12:56 -0800)
Add the entry for the CLKO1 clock.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/imx/clk-imx8mq.c
include/dt-bindings/clock/imx8mq-clock.h

index cd904764212be5ef3d2cb17014eb603dc76ca21d..897740f0a012e5769b9c42c8430fbbe7e1d022e8 100644 (file)
@@ -267,6 +267,8 @@ static const char * const imx8mq_ecspi3_sels[] = {"osc_25m", "sys2_pll_200m", "s
                                           "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out", };
 static const char * const imx8mq_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
 
+static const char * const imx8mq_clko1_sels[] = {"osc_25m", "sys1_pll_800m", "osc_27m", "sys1_pll_200m",
+                                         "audio_pll2_out", "sys2_pll_500m", "vpu_pll_out", "sys1_pll_80m", };
 static const char * const imx8mq_clko2_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_400m", "sys2_pll_166m",
                                          "sys3_pll2_out", "audio_pll1_out", "video_pll1_out", "ckil", };
 
@@ -486,6 +488,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
        clks[IMX8MQ_CLK_GPT1] = imx8m_clk_composite("gpt1", imx8mq_gpt1_sels, base + 0xb580);
        clks[IMX8MQ_CLK_WDOG] = imx8m_clk_composite("wdog", imx8mq_wdog_sels, base + 0xb900);
        clks[IMX8MQ_CLK_WRCLK] = imx8m_clk_composite("wrclk", imx8mq_wrclk_sels, base + 0xb980);
+       clks[IMX8MQ_CLK_CLKO1] = imx8m_clk_composite("clko1", imx8mq_clko1_sels, base + 0xba00);
        clks[IMX8MQ_CLK_CLKO2] = imx8m_clk_composite("clko2", imx8mq_clko2_sels, base + 0xba80);
        clks[IMX8MQ_CLK_DSI_CORE] = imx8m_clk_composite("dsi_core", imx8mq_dsi_core_sels, base + 0xbb00);
        clks[IMX8MQ_CLK_DSI_PHY_REF] = imx8m_clk_composite("dsi_phy_ref", imx8mq_dsi_phy_sels, base + 0xbb80);
index 04f7ac345984fa1752529d15b1205505f17a390f..74f80b26f679202233385199814787fb3a750587 100644 (file)
 
 #define IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK  267
 
-#define IMX8MQ_CLK_END                         268
+#define IMX8MQ_CLK_CLKO1                       268
+
+#define IMX8MQ_CLK_END                         269
 #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */