&& qemu_log_in_addr_range(itb->pc)) {
#if defined(TARGET_I386)
log_cpu_state(cpu, CPU_DUMP_CCOP);
-#elif defined(TARGET_M68K)
- /* ??? Should not modify env state for dumping. */
- cpu_m68k_flush_flags(env, env->cc_op);
- env->cc_op = CC_OP_FLAGS;
- env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
- log_cpu_state(cpu, 0);
#else
log_cpu_state(cpu, 0);
#endif
#else
cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
#endif
- cc->cpu_exec_enter = m68k_cpu_exec_enter;
- cc->cpu_exec_exit = m68k_cpu_exec_exit;
cc->disas_set_info = m68k_cpu_disas_set_info;
cc->gdb_num_core_regs = 18;
#define EXCP_HALT_INSN 0x101
#define NB_MMU_MODES 2
+#define TARGET_INSN_START_EXTRA_WORDS 1
typedef struct CPUM68KState {
uint32_t dregs[8];
int m68k_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void m68k_cpu_exec_enter(CPUState *cs);
-void m68k_cpu_exec_exit(CPUState *cs);
-
void m68k_tcg_init(void);
void m68k_cpu_init_gdb(M68kCPU *cpu);
M68kCPU *cpu_m68k_init(const char *cpu_model);
res |= (uint64_t)(val & 0xffff0000) << 16;
env->macc[acc + 1] = res;
}
-
-void m68k_cpu_exec_enter(CPUState *cs)
-{
- M68kCPU *cpu = M68K_CPU(cs);
- CPUM68KState *env = &cpu->env;
-
- env->cc_op = CC_OP_FLAGS;
- env->cc_dest = env->sr & 0xf;
- env->cc_x = (env->sr >> 4) & 1;
-}
-
-void m68k_cpu_exec_exit(CPUState *cs)
-{
- M68kCPU *cpu = M68K_CPU(cs);
- CPUM68KState *env = &cpu->env;
-
- cpu_m68k_flush_flags(env, env->cc_op);
- env->cc_op = CC_OP_FLAGS;
- env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
-}
do {
pc_offset = dc->pc - pc_start;
gen_throws_exception = NULL;
- tcg_gen_insn_start(dc->pc);
+ tcg_gen_insn_start(dc->pc, dc->cc_op);
num_insns++;
if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb,
target_ulong *data)
{
+ int cc_op = data[1];
env->pc = data[0];
+ if (cc_op != CC_OP_DYNAMIC) {
+ env->cc_op = cc_op;
+ }
}