arm64: dts: agilex/stratix10: fix pmu interrupt numbers

Fix up the correct interrupt numbers for the PMU unit on Agilex
and Stratix10.

Fixes: 78cd6a9d8e15 ("arm64: dts: Add base stratix 10 dtsi")
Cc: linux-stable <stable@vger.kernel.org>
Reported-by: Meng Li <Meng.Li@windriver.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 144a2c19ac02659a4b288d0df130ae26303d92cf..d1fc9c2055f4904c19e7661be8c1cb36082423ee 100644 (file)
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -61,10 +61,10 @@
 
        pmu {
                compatible = "arm,armv8-pmuv3";
-               interrupts = <0 120 8>,
-                            <0 121 8>,
-                            <0 122 8>,
-                            <0 123 8>;
+               interrupts = <0 170 4>,
+                            <0 171 4>,
+                            <0 172 4>,
+                            <0 173 4>;
                interrupt-affinity = <&cpu0>,
                                     <&cpu1>,
                                     <&cpu2>,

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index 94090c6fb946a6bee451056b935a00d80fbe0ec7..d43e1299c8ef618d65232a7dfcd7fdc9150ebf5b 100644 (file)
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -60,10 +60,10 @@
 
        pmu {
                compatible = "arm,armv8-pmuv3";
-               interrupts = <0 120 8>,
-                            <0 121 8>,
-                            <0 122 8>,
-                            <0 123 8>;
+               interrupts = <0 170 4>,
+                            <0 171 4>,
+                            <0 172 4>,
+                            <0 173 4>;
                interrupt-affinity = <&cpu0>,
                                     <&cpu1>,
                                     <&cpu2>,