struct skl_wrpll_params *wrpll_params)
{
uint64_t afe_clock = clock * 5; /* AFE Clock is 5x Pixel clock */
- uint64_t dco_central_freq[3] = {8400000000, 9000000000, 9600000000};
+ uint64_t dco_central_freq[3] = {8400000000ULL,
+ 9000000000ULL,
+ 9600000000ULL};
uint32_t min_dco_deviation = 400;
uint32_t min_dco_index = 3;
uint32_t P0[4] = {1, 2, 3, 7};
wrpll_params->central_freq = dco_central_freq[min_dco_index];
switch (dco_central_freq[min_dco_index]) {
- case 9600000000:
+ case 9600000000ULL:
wrpll_params->central_freq = 0;
break;
- case 9000000000:
+ case 9000000000ULL:
wrpll_params->central_freq = 1;
break;
- case 8400000000:
+ case 8400000000ULL:
wrpll_params->central_freq = 3;
}