drm/i915/gvt: move struct engine_mmio to mmio_context.c

struct engine_mmio is not used outside of mmio_context.c. Hide it, and
reduce includes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230926121904.499888-3-jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 3a0624fe63bf3b330d9e03c77497ba6c2e6889cd..c57aba09091fe06538bddbe3eead1744b4113c50 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -60,6 +60,8 @@
 
 #define GVT_MAX_VGPU 8
 
+struct engine_mmio;
+
 /* Describe per-platform limitations. */
 struct intel_gvt_device_info {
        u32 max_support_vgpus;

diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index 490e8ae5122879c73a87705cf1f33a8aa57cbb63..273db14fd5fc66c131bf1f1077f24c3d506bc843 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -45,6 +45,14 @@
 
 #define GEN9_MOCS_SIZE         64
 
+struct engine_mmio {
+       enum intel_engine_id id;
+       i915_reg_t reg;
+       u32 mask;
+       bool in_context;
+       u32 value;
+};
+
 /* Raw offset is appened to each line for convenience. */
 static struct engine_mmio gen8_engine_mmio_list[] __cacheline_aligned = {
        {RCS0, RING_MODE_GEN7(RENDER_RING_BASE), 0xffff, false}, /* 0x229c */

diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.h b/drivers/gpu/drm/i915/gvt/mmio_context.h
index 9540813b88e5b0c96a57f23375243fad7e6f09d0..a821edf574ddf23787e95f425e7061ec5a9d0e56 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/mmio_context.h
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.h
@@ -39,8 +39,6 @@
 #include <linux/types.h>
 
 #include "gt/intel_engine_regs.h"
-#include "gt/intel_engine_types.h"
-#include "gt/intel_lrc_reg.h"
 
 struct i915_request;
 struct intel_context;
@@ -48,14 +46,6 @@ struct intel_engine_cs;
 struct intel_gvt;
 struct intel_vgpu;
 
-struct engine_mmio {
-       enum intel_engine_id id;
-       i915_reg_t reg;
-       u32 mask;
-       bool in_context;
-       u32 value;
-};
-
 void intel_gvt_switch_mmio(struct intel_vgpu *pre,
                           struct intel_vgpu *next,
                           const struct intel_engine_cs *engine);