* publishhed by the Free Software Foundation.
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/clock/hi3620-clock.h>
/ {
aliases {
};
amba {
+
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,amba-bus";
sysctrl: system-controller@802000 {
compatible = "hisilicon,sysctrl";
- reg = <0x802000 0x1000>;
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
+ ranges = <0 0x802000 0x1000>;
+ reg = <0x802000 0x1000>;
smp-offset = <0x31c>;
resume-offset = <0x308>;
reboot-offset = <0x4>;
+
+ clock: clock@0 {
+ compatible = "hisilicon,hi3620-clock";
+ reg = <0 0x10000>;
+ #clock-cells = <1>;
+ };
};
dual_timer0: dual_timer@800000 {
reg = <0x800000 0x1000>;
/* timer00 & timer01 */
interrupts = <0 0 4>, <0 1 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_TIMER0_MUX>, <&clock HI3620_TIMER1_MUX>;
clock-names = "apb_pclk";
status = "disabled";
};
reg = <0x801000 0x1000>;
/* timer10 & timer11 */
interrupts = <0 2 4>, <0 3 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_TIMER2_MUX>, <&clock HI3620_TIMER3_MUX>;
clock-names = "apb_pclk";
status = "disabled";
};
reg = <0xa01000 0x1000>;
/* timer20 & timer21 */
interrupts = <0 4 4>, <0 5 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_TIMER4_MUX>, <&clock HI3620_TIMER5_MUX>;
clock-names = "apb_pclk";
status = "disabled";
};
reg = <0xa02000 0x1000>;
/* timer30 & timer31 */
interrupts = <0 6 4>, <0 7 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_TIMER6_MUX>, <&clock HI3620_TIMER7_MUX>;
clock-names = "apb_pclk";
status = "disabled";
};
reg = <0xa03000 0x1000>;
/* timer40 & timer41 */
interrupts = <0 96 4>, <0 97 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_TIMER8_MUX>, <&clock HI3620_TIMER9_MUX>;
clock-names = "apb_pclk";
status = "disabled";
};
compatible = "arm,pl011", "arm,primecell";
reg = <0xb00000 0x1000>;
interrupts = <0 20 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_UARTCLK0>;
clock-names = "apb_pclk";
status = "disabled";
};
compatible = "arm,pl011", "arm,primecell";
reg = <0xb01000 0x1000>;
interrupts = <0 21 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_UARTCLK1>;
clock-names = "apb_pclk";
status = "disabled";
};
compatible = "arm,pl011", "arm,primecell";
reg = <0xb02000 0x1000>;
interrupts = <0 22 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_UARTCLK2>;
clock-names = "apb_pclk";
status = "disabled";
};
compatible = "arm,pl011", "arm,primecell";
reg = <0xb03000 0x1000>;
interrupts = <0 23 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_UARTCLK3>;
clock-names = "apb_pclk";
status = "disabled";
};
compatible = "arm,pl011", "arm,primecell";
reg = <0xb04000 0x1000>;
interrupts = <0 24 4>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_UARTCLK4>;
clock-names = "apb_pclk";
status = "disabled";
};
&pmx0 5 0 1 &pmx0 6 1 1 &pmx0 7 2 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK0>;
clock-names = "apb_pclk";
};
&pmx0 6 5 1 &pmx0 7 6 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK1>;
clock-names = "apb_pclk";
};
&pmx0 6 3 1 &pmx0 7 3 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK2>;
clock-names = "apb_pclk";
};
&pmx0 6 11 1 &pmx0 7 11 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK3>;
clock-names = "apb_pclk";
};
&pmx0 6 13 1 &pmx0 7 13 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK4>;
clock-names = "apb_pclk";
};
&pmx0 6 16 1 &pmx0 7 16 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK5>;
clock-names = "apb_pclk";
};
&pmx0 6 18 1 &pmx0 7 19 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK6>;
clock-names = "apb_pclk";
};
&pmx0 6 25 1 &pmx0 7 26 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK7>;
clock-names = "apb_pclk";
};
&pmx0 6 33 1 &pmx0 7 34 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK8>;
clock-names = "apb_pclk";
};
&pmx0 6 41 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK9>;
clock-names = "apb_pclk";
};
&pmx0 5 45 1 &pmx0 6 46 1 &pmx0 7 46 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK10>;
clock-names = "apb_pclk";
};
&pmx0 6 49 1 &pmx0 7 49 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK11>;
clock-names = "apb_pclk";
};
&pmx0 6 51 1 &pmx0 7 52 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK12>;
clock-names = "apb_pclk";
};
&pmx0 6 55 1 &pmx0 7 56 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK13>;
clock-names = "apb_pclk";
};
&pmx0 6 60 1 &pmx0 7 61 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK14>;
clock-names = "apb_pclk";
};
&pmx0 6 64 1 &pmx0 7 65 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK15>;
clock-names = "apb_pclk";
};
&pmx0 6 72 1 &pmx0 7 73 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK16>;
clock-names = "apb_pclk";
};
&pmx0 6 80 1 &pmx0 7 81 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK17>;
clock-names = "apb_pclk";
};
&pmx0 6 86 1 &pmx0 7 87 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK18>;
clock-names = "apb_pclk";
};
&pmx0 3 88 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK19>;
clock-names = "apb_pclk";
};
&pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK20>;
clock-names = "apb_pclk";
};
gpio-ranges = < &pmx0 3 94 1 &pmx0 7 96 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&clock HI3620_GPIOCLK21>;
clock-names = "apb_pclk";
};