ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
regmap_write(tscadc->regmap, REG_CTRL, ctrl);
- /* Set register bits for Idle Config Mode */
if (tsc_wires > 0) {
tscadc->tsc_wires = tsc_wires;
if (tsc_wires == 5)
ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
else
ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
- tscadc_idle_config(tscadc);
}
+ tscadc_idle_config(tscadc);
+
/* Enable the TSC module enable bit */
ctrl |= CNTRLREG_TSCSSENB;
regmap_write(tscadc->regmap, REG_CTRL, ctrl);
ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
else
ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
- tscadc_idle_config(tscadc);
}
+
+ tscadc_idle_config(tscadc);
+
ctrl |= CNTRLREG_TSCSSENB;
regmap_write(tscadc->regmap, REG_CTRL, ctrl);