drm/i915: Add _TRANS2()

A new macro that is going to be added in a further patch will need to
adjust the offset returned by _MMIO_TRANS2(), so here adding
_TRANS2() and moving most of the implementation of _MMIO_TRANS2() to
it and while at it taking the opportunity to rename pipe to trans.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiya@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiya@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190730224753.14907-2-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index def6dbdc7e2ee7583b65059cc76d7831177e6ba3..2b7ccebf6550ccf99f41904432da67ab50aeba63 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -251,9 +251,10 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define _MMIO_PIPE2(pipe, reg)         _MMIO(INTEL_INFO(dev_priv)->pipe_offsets[pipe] - \
                                              INTEL_INFO(dev_priv)->pipe_offsets[PIPE_A] + (reg) + \
                                              DISPLAY_MMIO_BASE(dev_priv))
-#define _MMIO_TRANS2(pipe, reg)                _MMIO(INTEL_INFO(dev_priv)->trans_offsets[(pipe)] - \
-                                             INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \
-                                             DISPLAY_MMIO_BASE(dev_priv))
+#define _TRANS2(tran, reg)             (INTEL_INFO(dev_priv)->trans_offsets[(tran)] - \
+                                        INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \
+                                        DISPLAY_MMIO_BASE(dev_priv))
+#define _MMIO_TRANS2(tran, reg)                _MMIO(_TRANS2(tran, reg))
 #define _CURSOR2(pipe, reg)            _MMIO(INTEL_INFO(dev_priv)->cursor_offsets[(pipe)] - \
                                              INTEL_INFO(dev_priv)->cursor_offsets[PIPE_A] + (reg) + \
                                              DISPLAY_MMIO_BASE(dev_priv))