]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
drm/i915: Do not rely on wm preservation for ILK watermarks
authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Thu, 19 Oct 2017 15:13:40 +0000 (17:13 +0200)
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Fri, 27 Oct 2017 07:06:05 +0000 (09:06 +0200)
The original intent was to preserve watermarks as much as possible
in intel_pipe_wm.raw_wm, and put the validated ones in intel_pipe_wm.wm.

It seems this approach is insufficient and we don't always preserve
the raw watermarks, so just use the atomic iterator we're already using
to get a const pointer to all bound planes on the crtc.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102373
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: stable@vger.kernel.org #v4.8+
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171019151341.4579-1-maarten.lankhorst@linux.intel.com
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_pm.c

index 3b4eafd39f558d0d751b4a3ec902bb5b21b7018c..df966427232cc7fa85f9b3be0280ad3afed9ceac 100644 (file)
@@ -501,7 +501,6 @@ struct intel_crtc_scaler_state {
 
 struct intel_pipe_wm {
        struct intel_wm_level wm[5];
-       struct intel_wm_level raw_wm[5];
        uint32_t linetime;
        bool fbc_wm_enabled;
        bool pipe_enabled;
index 742d5455b2018367a62387378d0eb672b53b826d..e7926973112e650375fba5cc610ddf92e0cc4e6f 100644 (file)
@@ -2721,9 +2721,9 @@ static void ilk_compute_wm_level(const struct drm_i915_private *dev_priv,
                                 const struct intel_crtc *intel_crtc,
                                 int level,
                                 struct intel_crtc_state *cstate,
-                                struct intel_plane_state *pristate,
-                                struct intel_plane_state *sprstate,
-                                struct intel_plane_state *curstate,
+                                const struct intel_plane_state *pristate,
+                                const struct intel_plane_state *sprstate,
+                                const struct intel_plane_state *curstate,
                                 struct intel_wm_level *result)
 {
        uint16_t pri_latency = dev_priv->wm.pri_latency[level];
@@ -3043,28 +3043,24 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
        struct intel_pipe_wm *pipe_wm;
        struct drm_device *dev = state->dev;
        const struct drm_i915_private *dev_priv = to_i915(dev);
-       struct intel_plane *intel_plane;
-       struct intel_plane_state *pristate = NULL;
-       struct intel_plane_state *sprstate = NULL;
-       struct intel_plane_state *curstate = NULL;
+       struct drm_plane *plane;
+       const struct drm_plane_state *plane_state;
+       const struct intel_plane_state *pristate = NULL;
+       const struct intel_plane_state *sprstate = NULL;
+       const struct intel_plane_state *curstate = NULL;
        int level, max_level = ilk_wm_max_level(dev_priv), usable_level;
        struct ilk_wm_maximums max;
 
        pipe_wm = &cstate->wm.ilk.optimal;
 
-       for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-               struct intel_plane_state *ps;
-
-               ps = intel_atomic_get_existing_plane_state(state,
-                                                          intel_plane);
-               if (!ps)
-                       continue;
+       drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, &cstate->base) {
+               const struct intel_plane_state *ps = to_intel_plane_state(plane_state);
 
-               if (intel_plane->base.type == DRM_PLANE_TYPE_PRIMARY)
+               if (plane->type == DRM_PLANE_TYPE_PRIMARY)
                        pristate = ps;
-               else if (intel_plane->base.type == DRM_PLANE_TYPE_OVERLAY)
+               else if (plane->type == DRM_PLANE_TYPE_OVERLAY)
                        sprstate = ps;
-               else if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR)
+               else if (plane->type == DRM_PLANE_TYPE_CURSOR)
                        curstate = ps;
        }
 
@@ -3086,11 +3082,9 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
        if (pipe_wm->sprites_scaled)
                usable_level = 0;
 
-       ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate,
-                            pristate, sprstate, curstate, &pipe_wm->raw_wm[0]);
-
        memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
-       pipe_wm->wm[0] = pipe_wm->raw_wm[0];
+       ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate,
+                            pristate, sprstate, curstate, &pipe_wm->wm[0]);
 
        if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
                pipe_wm->linetime = hsw_compute_linetime_wm(cstate);
@@ -3100,8 +3094,8 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
 
        ilk_compute_wm_reg_maximums(dev_priv, 1, &max);
 
-       for (level = 1; level <= max_level; level++) {
-               struct intel_wm_level *wm = &pipe_wm->raw_wm[level];
+       for (level = 1; level <= usable_level; level++) {
+               struct intel_wm_level *wm = &pipe_wm->wm[level];
 
                ilk_compute_wm_level(dev_priv, intel_crtc, level, cstate,
                                     pristate, sprstate, curstate, wm);
@@ -3111,13 +3105,10 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
                 * register maximums since such watermarks are
                 * always invalid.
                 */
-               if (level > usable_level)
-                       continue;
-
-               if (ilk_validate_wm_level(level, &max, wm))
-                       pipe_wm->wm[level] = *wm;
-               else
-                       usable_level = level;
+               if (!ilk_validate_wm_level(level, &max, wm)) {
+                       memset(wm, 0, sizeof(*wm));
+                       break;
+               }
        }
 
        return 0;