* Sets a new clock ratio.
*/
---- ---static void longhaul_setstate(struct cpufreq_policy *policy,
++++ +++static int longhaul_setstate(struct cpufreq_policy *policy,
unsigned int table_index)
{
unsigned int mults_index;
/* Safety precautions */
mult = mults[mults_index & 0x1f];
if (mult == -1)
---- --- return;
++++ +++ return -EINVAL;
++++ +++
speed = calc_speed(mult);
if ((speed > highest_speed) || (speed < lowest_speed))
---- --- return;
++++ +++ return -EINVAL;
++++ +++
/* Voltage transition before frequency transition? */
if (can_scale_voltage && longhaul_index < table_index)
dir = 1;
freqs.old = calc_speed(longhaul_get_cpu_mult());
freqs.new = speed;
---- - - cpufreq_freq_transition_begin(policy, &freqs);
- cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
---- ---
pr_debug("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
fsb, mult/10, mult%10, print_speed(speed/1000));
retry_loop:
goto retry_loop;
}
}
---- --- /* Report true CPU frequency */
---- - - cpufreq_freq_transition_end(policy, &freqs, 0);
- cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
---- --- if (!bm_timeout)
++++ +++ if (!bm_timeout) {
printk(KERN_INFO PFX "Warning: Timeout while waiting for "
"idle PCI bus.\n");
++++ +++ return -EBUSY;
++++ +++ }
++++ +++
++++ +++ return 0;
}
/*
return -EINVAL;
}
- longhaul_table = kmalloc((numscales + 1) * sizeof(*longhaul_table),
+ longhaul_table = kzalloc((numscales + 1) * sizeof(*longhaul_table),
GFP_KERNEL);
if (!longhaul_table)
return -ENOMEM;
static void longhaul_setup_voltagescaling(void)
{
++ ++++++ struct cpufreq_frequency_table *freq_pos;
union msr_longhaul longhaul;
struct mV_pos minvid, maxvid, vid;
unsigned int j, speed, pos, kHz_step, numvscales;
/* Calculate kHz for one voltage step */
kHz_step = (highest_speed - min_vid_speed) / numvscales;
-- ------ j = 0;
-- ------ while (longhaul_table[j].frequency != CPUFREQ_TABLE_END) {
-- ------ speed = longhaul_table[j].frequency;
++ ++++++ cpufreq_for_each_entry(freq_pos, longhaul_table) {
++ ++++++ speed = freq_pos->frequency;
if (speed > min_vid_speed)
pos = (speed - min_vid_speed) / kHz_step + minvid.pos;
else
pos = minvid.pos;
-- ------ longhaul_table[j].driver_data |= mV_vrm_table[pos] << 8;
++ ++++++ freq_pos->driver_data |= mV_vrm_table[pos] << 8;
vid = vrm_mV_table[mV_vrm_table[pos]];
printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n",
-- ------ speed, j, vid.mV);
-- ------ j++;
++ ++++++ speed, (int)(freq_pos - longhaul_table), vid.mV);
}
can_scale_voltage = 1;
unsigned int i;
unsigned int dir = 0;
u8 vid, current_vid;
++++ +++ int retval = 0;
if (!can_scale_voltage)
---- --- longhaul_setstate(policy, table_index);
++++ +++ retval = longhaul_setstate(policy, table_index);
else {
/* On test system voltage transitions exceeding single
* step up or down were turning motherboard off. Both
while (i != table_index) {
vid = (longhaul_table[i].driver_data >> 8) & 0x1f;
if (vid != current_vid) {
---- --- longhaul_setstate(policy, i);
++++ +++ retval = longhaul_setstate(policy, i);
current_vid = vid;
msleep(200);
}
else
i--;
}
---- --- longhaul_setstate(policy, table_index);
++++ +++ retval = longhaul_setstate(policy, table_index);
}
++++ +++
longhaul_index = table_index;
---- --- return 0;
++++ +++ return retval;
}
.target_index = longhaul_target,
.get = longhaul_get,
.init = longhaul_cpu_init,
- .exit = cpufreq_generic_exit,
.name = "longhaul",
.attr = cpufreq_generic_attr,
};
for (i = 0; i < numscales; i++) {
if (mults[i] == maxmult) {
++++ +++ struct cpufreq_freqs freqs;
++++ +++
++++ +++ freqs.old = policy->cur;
++++ +++ freqs.new = longhaul_table[i].frequency;
++++ +++ freqs.flags = 0;
++++ +++
++++ +++ cpufreq_freq_transition_begin(policy, &freqs);
longhaul_setstate(policy, i);
++++ +++ cpufreq_freq_transition_end(policy, &freqs, 0);
break;
}
}
/* Clock ratio multiplied by 10 - see table 27 in AMD#23446 */
static struct cpufreq_frequency_table clock_ratio[] = {
- {60, /* 110 -> 6.0x */ 0},
- {55, /* 011 -> 5.5x */ 0},
- {50, /* 001 -> 5.0x */ 0},
- {45, /* 000 -> 4.5x */ 0},
- {40, /* 010 -> 4.0x */ 0},
- {35, /* 111 -> 3.5x */ 0},
- {30, /* 101 -> 3.0x */ 0},
- {20, /* 100 -> 2.0x */ 0},
- {0, CPUFREQ_TABLE_END}
+ {0, 60, /* 110 -> 6.0x */ 0},
+ {0, 55, /* 011 -> 5.5x */ 0},
+ {0, 50, /* 001 -> 5.0x */ 0},
+ {0, 45, /* 000 -> 4.5x */ 0},
+ {0, 40, /* 010 -> 4.0x */ 0},
+ {0, 35, /* 111 -> 3.5x */ 0},
+ {0, 30, /* 101 -> 3.0x */ 0},
+ {0, 20, /* 100 -> 2.0x */ 0},
+ {0, 0, CPUFREQ_TABLE_END}
};
static const u8 index_to_register[8] = { 6, 3, 1, 0, 2, 7, 5, 4 };
static int powernow_k6_target(struct cpufreq_policy *policy,
unsigned int best_i)
{
---- --- struct cpufreq_freqs freqs;
if (clock_ratio[best_i].driver_data > max_multiplier) {
printk(KERN_ERR PFX "invalid target frequency\n");
return -EINVAL;
}
---- --- freqs.old = busfreq * powernow_k6_get_cpu_multiplier();
---- --- freqs.new = busfreq * clock_ratio[best_i].driver_data;
---- ---
---- - - cpufreq_freq_transition_begin(policy, &freqs);
- cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
---- ---
powernow_k6_set_cpu_multiplier(best_i);
---- - - cpufreq_freq_transition_end(policy, &freqs, 0);
- cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
---- ---
return 0;
}
static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
{
++ ++++++ struct cpufreq_frequency_table *pos;
unsigned int i, f;
unsigned khz;
}
}
if (param_max_multiplier) {
-- ------ for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
-- ------ if (clock_ratio[i].driver_data == param_max_multiplier) {
++ ++++++ cpufreq_for_each_entry(pos, clock_ratio)
++ ++++++ if (pos->driver_data == param_max_multiplier) {
max_multiplier = param_max_multiplier;
goto have_max_multiplier;
}
-- ------ }
printk(KERN_ERR "powernow-k6: invalid max_multiplier parameter, valid parameters 20, 30, 35, 40, 45, 50, 55, 60\n");
return -EINVAL;
}
param_busfreq = busfreq * 10;
/* table init */
-- ------ for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
-- ------ f = clock_ratio[i].driver_data;
++ ++++++ cpufreq_for_each_entry(pos, clock_ratio) {
++ ++++++ f = pos->driver_data;
if (f > max_multiplier)
-- ------ clock_ratio[i].frequency = CPUFREQ_ENTRY_INVALID;
++ ++++++ pos->frequency = CPUFREQ_ENTRY_INVALID;
else
-- ------ clock_ratio[i].frequency = busfreq * f;
++ ++++++ pos->frequency = busfreq * f;
}
/* cpuinfo and default policy values */
static int powernow_k6_cpu_exit(struct cpufreq_policy *policy)
{
unsigned int i;
---- --- for (i = 0; i < 8; i++) {
---- --- if (i == max_multiplier)
++++ +++
++++ +++ for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
++++ +++ if (clock_ratio[i].driver_data == max_multiplier) {
++++ +++ struct cpufreq_freqs freqs;
++++ +++
++++ +++ freqs.old = policy->cur;
++++ +++ freqs.new = clock_ratio[i].frequency;
++++ +++ freqs.flags = 0;
++++ +++
++++ +++ cpufreq_freq_transition_begin(policy, &freqs);
powernow_k6_target(policy, i);
++++ +++ cpufreq_freq_transition_end(policy, &freqs, 0);
++++ +++ break;
++++ +++ }
}
- cpufreq_frequency_table_put_attr(policy->cpu);
return 0;
}
additional drivers must be enabled in order to use the
functionality of the device.
+ config MFD_BCM590XX
+ tristate "Broadcom BCM590xx PMUs"
+ select MFD_CORE
+ select REGMAP_I2C
+ depends on I2C
+ help
+ Support for the BCM590xx PMUs from Broadcom
+
config MFD_CROS_EC
tristate "ChromeOS Embedded Controller"
select MFD_CORE
bool "Dialog Semiconductor DA9030/DA9034 PMIC Support"
depends on I2C=y
help
- Say yes here to support for Dialog Semiconductor DA9030 (a.k.a
+ Say yes here to add support for Dialog Semiconductor DA9030 (a.k.a
ARAVA) and DA9034 (a.k.a MICCO), these are Power Management IC
usually found on PXA processors-based platforms. This includes
the I2C driver and the core APIs _only_, you have to select
device may provide functions like watchdog, GPIO, UART and I2C bus.
The following modules are supported:
+ * COMe-bHL6
* COMe-bIP#
* COMe-bPC2 (ETXexpress-PC)
* COMe-bSC# (ETXexpress-SC T#)
+ * COMe-cBT6
* COMe-cCT6
* COMe-cDC2 (microETXexpress-DC)
+ * COMe-cHL6
* COMe-cPC2 (microETXexpress-PC)
+ * COMe-mBT10
* COMe-mCT10
+ * COMe-mTT10 (nanoETXexpress-TT)
* ETX-OH
This driver can also be built as a module. If so, the module
battery-charger under the corresponding menus.
config MFD_MAX14577
---- ---- bool "Maxim Semiconductor MAX14577 MUIC + Charger Support"
++++ ++++ bool "Maxim Semiconductor MAX14577/77836 MUIC + Charger Support"
depends on I2C=y
select MFD_CORE
select REGMAP_I2C
+ select REGMAP_IRQ
select IRQ_DOMAIN
help
---- -- - Say yes here to add support for Maxim Semiconductor MAX14577.
- Say yes here to support for Maxim Semiconductor MAX14577.
---- ---- This is a Micro-USB IC with Charger controls on chip.
++++ ++++ Say yes here to add support for Maxim Semiconductor MAX14577 and
++++ ++++ MAX77836 Micro-USB ICs with battery charger.
This driver provides common support for accessing the device;
additional drivers must be enabled in order to use the functionality
of the device.
select REGMAP_I2C
select IRQ_DOMAIN
help
- Say yes here to support for Maxim Semiconductor MAX77686.
+ Say yes here to add support for Maxim Semiconductor MAX77686.
This is a Power Management IC with RTC on chip.
This driver provides common support for accessing the device;
additional drivers must be enabled in order to use the functionality
select MFD_CORE
select REGMAP_I2C
help
- Say yes here to support for Maxim Semiconductor MAX77693.
+ Say yes here to add support for Maxim Semiconductor MAX77693.
This is a companion Power Management IC with Flash, Haptic, Charger,
and MUIC(Micro USB Interface Controller) controls on chip.
This driver provides common support for accessing the device;
select REGMAP_I2C
select REGMAP_IRQ
help
- Say yes here to support for Maxim Semiconductor MAX8907. This is
+ Say yes here to add support for Maxim Semiconductor MAX8907. This is
a Power Management IC. This driver provides common support for
accessing the device; additional drivers must be enabled in order
to use the functionality of the device.
depends on I2C=y
select MFD_CORE
help
- Say yes here to support for Maxim Semiconductor MAX8925. This is
+ Say yes here to add support for Maxim Semiconductor MAX8925. This is
a Power Management IC. This driver provides common support for
accessing the device, additional drivers must be enabled in order
to use the functionality of the device.
select MFD_CORE
select IRQ_DOMAIN
help
- Say yes here to support for Maxim Semiconductor MAX8997/8966.
+ Say yes here to add support for Maxim Semiconductor MAX8997/8966.
This is a Power Management IC with RTC, Flash, Fuel Gauge, Haptic,
MUIC controls on chip.
This driver provides common support for accessing the device;
select MFD_CORE
select IRQ_DOMAIN
help
- Say yes here to support for Maxim Semiconductor MAX8998 and
+ Say yes here to add support for Maxim Semiconductor MAX8998 and
National Semiconductor LP3974. This is a Power Management IC.
This driver provides common support for accessing the device,
additional drivers must be enabled in order to use the functionality
config MFD_PM8921_CORE
tristate "Qualcomm PM8921 PMIC chip"
- depends on (ARCH_MSM || HEXAGON)
- depends on BROKEN
+ depends on (ARM || HEXAGON)
+ select IRQ_DOMAIN
select MFD_CORE
select MFD_PM8XXX
+ select REGMAP
help
If you say yes to this option, support will be included for the
built-in PM8921 PMIC chip.
Say M here if you want to include support for PM8921 chip as a module.
This will build a module called "pm8921-core".
- config MFD_PM8XXX_IRQ
- bool "Qualcomm PM8xxx IRQ features"
- depends on MFD_PM8XXX
- default y if MFD_PM8XXX
- help
- This is the IRQ driver for Qualcomm PM 8xxx PMIC chips.
-
- This is required to use certain other PM 8xxx features, such as GPIO
- and MPP.
-
config MFD_RDC321X
tristate "RDC R-321x southbridge"
select MFD_CORE
types of memory cards, such as Memory Stick, Memory Stick Pro,
Secure Digital and MultiMediaCard.
+ config MFD_RTSX_USB
+ tristate "Realtek USB card reader"
+ depends on USB
+ select MFD_CORE
+ help
+ Select this option to get support for Realtek USB 2.0 card readers
+ including RTS5129, RTS5139, RTS5179 and RTS5170.
+ Realtek card reader supports access to many types of memory cards,
+ such as Memory Stick Pro, Secure Digital and MultiMediaCard.
+
config MFD_RC5T583
bool "Ricoh RC5T583 Power Management system device"
depends on I2C=y
config MFD_STMPE
bool "STMicroelectronics STMPE"
depends on (I2C=y || SPI_MASTER=y)
+++++ +++ depends on OF
select MFD_CORE
help
Support for the STMPE family of I/O Expanders from
If you say yes here you get support for the Palmas
series of PMIC chips from Texas Instruments.
- config MFD_TI_SSP
- tristate "TI Sequencer Serial Port support"
- depends on ARCH_DAVINCI_TNETV107X
- select MFD_CORE
- ---help---
- Say Y here if you want support for the Sequencer Serial Port
- in a Texas Instruments TNETV107X SoC.
-
- To compile this driver as a module, choose M here: the
- module will be called ti-ssp.
-
config TPS6105X
tristate "TI TPS61050/61052 Boost Converters"
depends on I2C
This driver can also be built as a module. If so, the module
will be called tps65217.
+ config MFD_TPS65218
+ tristate "TI TPS65218 Power Management chips"
+ depends on I2C
+ select MFD_CORE
+ select REGMAP_I2C
+ select REGMAP_IRQ
+ help
+ If you say yes here you get support for the TPS65218 series of
+ Power Management chips.
+ These include voltage regulators, gpio and other features
+ that are often used in portable devices. Only regulator
+ component is currently supported.
+
+ This driver can also be built as a module. If so, the module
+ will be called tps65218.
+
config MFD_TPS6586X
bool "TI TPS6586x Power Management chips"
depends on I2C=y
high speed USB OTG transceiver, an audio codec (on most
versions) and many other features.
- config TWL4030_MADC
- tristate "TI TWL4030 MADC"
- depends on TWL4030_CORE
- help
- This driver provides support for triton TWL4030-MADC. The
- driver supports both RT and SW conversion methods.
-
- This driver can be built as a module. If so it will be
- named twl4030-madc
-
config TWL4030_POWER
bool "TI TWL4030 power resources"
depends on TWL4030_CORE && ARM
in various ST Microelectronics and ST-Ericsson embedded
Nomadik series.
- endmenu
- endif
-
menu "Multimedia Capabilities Port drivers"
depends on ARCH_SA1100
help
Platform configuration infrastructure for the ARM Ltd.
Versatile Express.
+
+ endmenu
+ endif
#define TWL4030_BASEADD_BACKUP 0x0014
#define TWL4030_BASEADD_INT 0x002E
#define TWL4030_BASEADD_PM_MASTER 0x0036
+++++++ +
#define TWL4030_BASEADD_PM_RECEIVER 0x005B
+++++++ +#define TWL4030_DCDC_GLOBAL_CFG 0x06
+++++++ +#define SMARTREFLEX_ENABLE BIT(3)
+++++++ +
#define TWL4030_BASEADD_RTC 0x001C
#define TWL4030_BASEADD_SECURED_REG 0x0000
static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
- case 0:
- case 3:
- case 40:
- case 41:
- case 42:
+ case 0x00:
+ case 0x03:
+ case 0x40:
+ case 0x41:
+ case 0x42:
return false;
default:
return true;
* Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
* Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
* SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
+++++++ + *
+++++++ + * Also, always enable SmartReflex bit as that's needed for omaps to
+++++++ + * to do anything over I2C4 for voltage scaling even if SmartReflex
+++++++ + * is disabled. Without the SmartReflex bit omap sys_clkreq idle
+++++++ + * signal will never trigger for retention idle.
*/
if (twl_class_is_4030()) {
u8 temp;
temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
+++++++ +
+++++++ + twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
+++++++ + TWL4030_DCDC_GLOBAL_CFG);
+++++++ + temp |= SMARTREFLEX_ENABLE;
+++++++ + twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
+++++++ + TWL4030_DCDC_GLOBAL_CFG);
}
if (node) {
projects / mirror_ubuntu-zesty-kernel.git / commitdiff