PCI: intel-gw: Fix INTx enable

BugLink: https://bugs.launchpad.net/bugs/1939738
[ Upstream commit 655832d12f2251e04031294f547c86935a0a126d ]

The legacy PCI interrupt lines need to be enabled using PCIE_APP_IRNEN bits
13 (INTA), 14 (INTB), 15 (INTC) and 16 (INTD). The old code however was
taking (for example) "13" as raw value instead of taking BIT(13).  Define
the legacy PCI interrupt bits using the BIT() macro and then use these in
PCIE_APP_IRN_INT.

Link: https://lore.kernel.org/r/20210106135540.48420-1-martin.blumenstingl@googlemail.com
Fixes: ed22aaaede44 ("PCI: dwc: intel: PCIe RC controller driver")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rahul Tanwar <rtanwar@maxlinear.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>

diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c
index 0cedd1f95f372c9e70f875db2921e19f3c0241c9..ae96bfbb6c8325d3fa7683fa99fe438e9dd29230 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-intel-gw.c
+++ b/drivers/pci/controller/dwc/pcie-intel-gw.c
@@ -39,6 +39,10 @@
 #define PCIE_APP_IRN_PM_TO_ACK         BIT(9)
 #define PCIE_APP_IRN_LINK_AUTO_BW_STAT BIT(11)
 #define PCIE_APP_IRN_BW_MGT            BIT(12)
+#define PCIE_APP_IRN_INTA              BIT(13)
+#define PCIE_APP_IRN_INTB              BIT(14)
+#define PCIE_APP_IRN_INTC              BIT(15)
+#define PCIE_APP_IRN_INTD              BIT(16)
 #define PCIE_APP_IRN_MSG_LTR           BIT(18)
 #define PCIE_APP_IRN_SYS_ERR_RC                BIT(29)
 #define PCIE_APP_INTX_OFST             12
@@ -48,10 +52,8 @@
        PCIE_APP_IRN_RX_VDM_MSG | PCIE_APP_IRN_SYS_ERR_RC | \
        PCIE_APP_IRN_PM_TO_ACK | PCIE_APP_IRN_MSG_LTR | \
        PCIE_APP_IRN_BW_MGT | PCIE_APP_IRN_LINK_AUTO_BW_STAT | \
-       (PCIE_APP_INTX_OFST + PCI_INTERRUPT_INTA) | \
-       (PCIE_APP_INTX_OFST + PCI_INTERRUPT_INTB) | \
-       (PCIE_APP_INTX_OFST + PCI_INTERRUPT_INTC) | \
-       (PCIE_APP_INTX_OFST + PCI_INTERRUPT_INTD))
+       PCIE_APP_IRN_INTA | PCIE_APP_IRN_INTB | \
+       PCIE_APP_IRN_INTC | PCIE_APP_IRN_INTD)
 
 #define BUS_IATU_OFFSET                        SZ_256M
 #define RESET_INTERVAL_MS              100