int tm6000_init_analog_mode (struct tm6000_core *dev)
{
+ if (dev->dev_type == TM6010) {
+ int val;
- /* Enables soft reset */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x01);
+ /* Enable video */
+ val = tm6000_get_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, 0);
+ val |= 0x60;
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, val);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xfe, 0xcf);
- if (dev->scaler) {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc0, 0x20);
} else {
- /* Enable Hfilter and disable TS Drop err */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc0, 0x80);
- }
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc3, 0x88);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xda, 0x23);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd1, 0xc0);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd2, 0xd8);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd6, 0x06);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xdf, 0x1f);
-
- /* AP Software reset */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xff, 0x08);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xff, 0x00);
+ /* Enables soft reset */
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0x3f, 0x01);
+
+ if (dev->scaler) {
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc0, 0x20);
+ } else {
+ /* Enable Hfilter and disable TS Drop err */
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc0, 0x80);
+ }
- tm6000_set_fourcc_format(dev);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc3, 0x88);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xda, 0x23);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xd1, 0xc0);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xd2, 0xd8);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xd6, 0x06);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xdf, 0x1f);
- /* Disables soft reset */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x00);
+ /* AP Software reset */
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xff, 0x08);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xff, 0x00);
- /* E3: Select input 0 - TV tuner */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe3, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
+ tm6000_set_fourcc_format(dev);
- /* Tuner firmware can now be loaded */
+ /* Disables soft reset */
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0x3f, 0x00);
- tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 0x00);
- msleep(11);
+ /* E3: Select input 0 - TV tuner */
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xe3, 0x00);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
- /* This controls input */
- tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_2, 0x0);
- tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_3, 0x01);
+ /* This controls input */
+ tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_2, 0x0);
+ tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_3, 0x01);
+ }
msleep(20);
+ /* Tuner firmware can now be loaded */
+
/*FIXME: Hack!!! */
struct v4l2_frequency f;
mutex_lock(&dev->lock);
tm6000_set_standard (dev, &dev->norm);
tm6000_set_audio_bitrate (dev,48000);
-
return 0;
}
return 0;
}
+struct reg_init {
+ u8 req;
+ u8 reg;
+ u8 val;
+};
+
/* The meaning of those initializations are unknown */
-u8 init_tab[][2] = {
+struct reg_init tm6000_init_tab[] = {
/* REG VALUE */
- { 0xdf, 0x1f },
- { 0xff, 0x08 },
- { 0xff, 0x00 },
- { 0xd5, 0x4f },
- { 0xda, 0x23 },
- { 0xdb, 0x08 },
- { 0xe2, 0x00 },
- { 0xe3, 0x10 },
- { 0xe5, 0x00 },
- { 0xe8, 0x00 },
- { 0xeb, 0x64 }, /* 48000 bits/sample, external input */
- { 0xee, 0xc2 },
- { 0x3f, 0x01 }, /* Start of soft reset */
- { 0x00, 0x00 },
- { 0x01, 0x07 },
- { 0x02, 0x5f },
- { 0x03, 0x00 },
- { 0x05, 0x64 },
- { 0x07, 0x01 },
- { 0x08, 0x82 },
- { 0x09, 0x36 },
- { 0x0a, 0x50 },
- { 0x0c, 0x6a },
- { 0x11, 0xc9 },
- { 0x12, 0x07 },
- { 0x13, 0x3b },
- { 0x14, 0x47 },
- { 0x15, 0x6f },
- { 0x17, 0xcd },
- { 0x18, 0x1e },
- { 0x19, 0x8b },
- { 0x1a, 0xa2 },
- { 0x1b, 0xe9 },
- { 0x1c, 0x1c },
- { 0x1d, 0xcc },
- { 0x1e, 0xcc },
- { 0x1f, 0xcd },
- { 0x20, 0x3c },
- { 0x21, 0x3c },
- { 0x2d, 0x48 },
- { 0x2e, 0x88 },
- { 0x30, 0x22 },
- { 0x31, 0x61 },
- { 0x32, 0x74 },
- { 0x33, 0x1c },
- { 0x34, 0x74 },
- { 0x35, 0x1c },
- { 0x36, 0x7a },
- { 0x37, 0x26 },
- { 0x38, 0x40 },
- { 0x39, 0x0a },
- { 0x42, 0x55 },
- { 0x51, 0x11 },
- { 0x55, 0x01 },
- { 0x57, 0x02 },
- { 0x58, 0x35 },
- { 0x59, 0xa0 },
- { 0x80, 0x15 },
- { 0x82, 0x42 },
- { 0xc1, 0xd0 },
- { 0xc3, 0x88 },
- { 0x3f, 0x00 }, /* End of the soft reset */
+ { REQ_07_SET_GET_AVREG, 0xdf, 0x1f },
+ { REQ_07_SET_GET_AVREG, 0xff, 0x08 },
+ { REQ_07_SET_GET_AVREG, 0xff, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0xd5, 0x4f },
+ { REQ_07_SET_GET_AVREG, 0xda, 0x23 },
+ { REQ_07_SET_GET_AVREG, 0xdb, 0x08 },
+ { REQ_07_SET_GET_AVREG, 0xe2, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0xe3, 0x10 },
+ { REQ_07_SET_GET_AVREG, 0xe5, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0xe8, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0xeb, 0x64 }, /* 48000 bits/sample, external input */
+ { REQ_07_SET_GET_AVREG, 0xee, 0xc2 },
+ { REQ_07_SET_GET_AVREG, 0x3f, 0x01 }, /* Start of soft reset */
+ { REQ_07_SET_GET_AVREG, 0x00, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0x01, 0x07 },
+ { REQ_07_SET_GET_AVREG, 0x02, 0x5f },
+ { REQ_07_SET_GET_AVREG, 0x03, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0x05, 0x64 },
+ { REQ_07_SET_GET_AVREG, 0x07, 0x01 },
+ { REQ_07_SET_GET_AVREG, 0x08, 0x82 },
+ { REQ_07_SET_GET_AVREG, 0x09, 0x36 },
+ { REQ_07_SET_GET_AVREG, 0x0a, 0x50 },
+ { REQ_07_SET_GET_AVREG, 0x0c, 0x6a },
+ { REQ_07_SET_GET_AVREG, 0x11, 0xc9 },
+ { REQ_07_SET_GET_AVREG, 0x12, 0x07 },
+ { REQ_07_SET_GET_AVREG, 0x13, 0x3b },
+ { REQ_07_SET_GET_AVREG, 0x14, 0x47 },
+ { REQ_07_SET_GET_AVREG, 0x15, 0x6f },
+ { REQ_07_SET_GET_AVREG, 0x17, 0xcd },
+ { REQ_07_SET_GET_AVREG, 0x18, 0x1e },
+ { REQ_07_SET_GET_AVREG, 0x19, 0x8b },
+ { REQ_07_SET_GET_AVREG, 0x1a, 0xa2 },
+ { REQ_07_SET_GET_AVREG, 0x1b, 0xe9 },
+ { REQ_07_SET_GET_AVREG, 0x1c, 0x1c },
+ { REQ_07_SET_GET_AVREG, 0x1d, 0xcc },
+ { REQ_07_SET_GET_AVREG, 0x1e, 0xcc },
+ { REQ_07_SET_GET_AVREG, 0x1f, 0xcd },
+ { REQ_07_SET_GET_AVREG, 0x20, 0x3c },
+ { REQ_07_SET_GET_AVREG, 0x21, 0x3c },
+ { REQ_07_SET_GET_AVREG, 0x2d, 0x48 },
+ { REQ_07_SET_GET_AVREG, 0x2e, 0x88 },
+ { REQ_07_SET_GET_AVREG, 0x30, 0x22 },
+ { REQ_07_SET_GET_AVREG, 0x31, 0x61 },
+ { REQ_07_SET_GET_AVREG, 0x32, 0x74 },
+ { REQ_07_SET_GET_AVREG, 0x33, 0x1c },
+ { REQ_07_SET_GET_AVREG, 0x34, 0x74 },
+ { REQ_07_SET_GET_AVREG, 0x35, 0x1c },
+ { REQ_07_SET_GET_AVREG, 0x36, 0x7a },
+ { REQ_07_SET_GET_AVREG, 0x37, 0x26 },
+ { REQ_07_SET_GET_AVREG, 0x38, 0x40 },
+ { REQ_07_SET_GET_AVREG, 0x39, 0x0a },
+ { REQ_07_SET_GET_AVREG, 0x42, 0x55 },
+ { REQ_07_SET_GET_AVREG, 0x51, 0x11 },
+ { REQ_07_SET_GET_AVREG, 0x55, 0x01 },
+ { REQ_07_SET_GET_AVREG, 0x57, 0x02 },
+ { REQ_07_SET_GET_AVREG, 0x58, 0x35 },
+ { REQ_07_SET_GET_AVREG, 0x59, 0xa0 },
+ { REQ_07_SET_GET_AVREG, 0x80, 0x15 },
+ { REQ_07_SET_GET_AVREG, 0x82, 0x42 },
+ { REQ_07_SET_GET_AVREG, 0xc1, 0xd0 },
+ { REQ_07_SET_GET_AVREG, 0xc3, 0x88 },
+ { REQ_07_SET_GET_AVREG, 0x3f, 0x00 }, /* End of the soft reset */
+ { REQ_05_SET_GET_USBREG, 0x18, 0x00 },
+};
+
+struct reg_init tm6010_init_tab[] = {
+ { REQ_07_SET_GET_AVREG, 0xc0, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0xc4, 0xa0 },
+ { REQ_07_SET_GET_AVREG, 0xc6, 0x40 },
+ { REQ_07_SET_GET_AVREG, 0xca, 0x31 },
+ { REQ_07_SET_GET_AVREG, 0xcc, 0xe1 },
+ { REQ_07_SET_GET_AVREG, 0xe0, 0x03 },
+ { REQ_07_SET_GET_AVREG, 0xfe, 0x7f },
+
+ { REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0 },
+ { REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf4 },
+ { REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf8 },
+ { REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x00 },
+ { REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf2 },
+ { REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xf0 },
+ { REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2 },
+ { REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x60 },
+ { REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc },
+
+ { REQ_07_SET_GET_AVREG, 0x3f, 0x01 },
+ { REQ_07_SET_GET_AVREG, 0x00, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0x01, 0x07 },
+ { REQ_07_SET_GET_AVREG, 0x02, 0x5f },
+ { REQ_07_SET_GET_AVREG, 0x03, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0x05, 0x64 },
+ { REQ_07_SET_GET_AVREG, 0x07, 0x01 },
+ { REQ_07_SET_GET_AVREG, 0x08, 0x82 },
+ { REQ_07_SET_GET_AVREG, 0x09, 0x36 },
+ { REQ_07_SET_GET_AVREG, 0x0a, 0x50 },
+ { REQ_07_SET_GET_AVREG, 0x0c, 0x6a },
+ { REQ_07_SET_GET_AVREG, 0x11, 0xc9 },
+ { REQ_07_SET_GET_AVREG, 0x12, 0x07 },
+ { REQ_07_SET_GET_AVREG, 0x13, 0x3b },
+ { REQ_07_SET_GET_AVREG, 0x14, 0x47 },
+ { REQ_07_SET_GET_AVREG, 0x15, 0x6f },
+ { REQ_07_SET_GET_AVREG, 0x17, 0xcd },
+ { REQ_07_SET_GET_AVREG, 0x18, 0x1e },
+ { REQ_07_SET_GET_AVREG, 0x19, 0x8b },
+ { REQ_07_SET_GET_AVREG, 0x1a, 0xa2 },
+ { REQ_07_SET_GET_AVREG, 0x1b, 0xe9 },
+ { REQ_07_SET_GET_AVREG, 0x1c, 0x1c },
+ { REQ_07_SET_GET_AVREG, 0x1d, 0xcc },
+ { REQ_07_SET_GET_AVREG, 0x1e, 0xcc },
+ { REQ_07_SET_GET_AVREG, 0x1f, 0xcd },
+ { REQ_07_SET_GET_AVREG, 0x20, 0x3c },
+ { REQ_07_SET_GET_AVREG, 0x21, 0x3c },
+ { REQ_07_SET_GET_AVREG, 0x2d, 0x48 },
+ { REQ_07_SET_GET_AVREG, 0x2e, 0x88 },
+ { REQ_07_SET_GET_AVREG, 0x30, 0x22 },
+ { REQ_07_SET_GET_AVREG, 0x31, 0x61 },
+ { REQ_07_SET_GET_AVREG, 0x32, 0x74 },
+ { REQ_07_SET_GET_AVREG, 0x33, 0x1c },
+ { REQ_07_SET_GET_AVREG, 0x34, 0x74 },
+ { REQ_07_SET_GET_AVREG, 0x35, 0x1c },
+ { REQ_07_SET_GET_AVREG, 0x36, 0x7a },
+ { REQ_07_SET_GET_AVREG, 0x37, 0x26 },
+ { REQ_07_SET_GET_AVREG, 0x38, 0x40 },
+ { REQ_07_SET_GET_AVREG, 0x39, 0x0a },
+ { REQ_07_SET_GET_AVREG, 0x42, 0x55 },
+ { REQ_07_SET_GET_AVREG, 0x51, 0x11 },
+ { REQ_07_SET_GET_AVREG, 0x55, 0x01 },
+ { REQ_07_SET_GET_AVREG, 0x57, 0x02 },
+ { REQ_07_SET_GET_AVREG, 0x58, 0x35 },
+ { REQ_07_SET_GET_AVREG, 0x59, 0xa0 },
+ { REQ_07_SET_GET_AVREG, 0x80, 0x15 },
+ { REQ_07_SET_GET_AVREG, 0x82, 0x42 },
+ { REQ_07_SET_GET_AVREG, 0xc1, 0xd0 },
+ { REQ_07_SET_GET_AVREG, 0xc3, 0x88 },
+ { REQ_07_SET_GET_AVREG, 0x3f, 0x00 },
+
+ { REQ_05_SET_GET_USBREG, 0x18, 0x00 },
+
+ /* set remote wakeup key:any key wakeup */
+ { REQ_07_SET_GET_AVREG, 0xe5, 0xfe },
+ { REQ_07_SET_GET_AVREG, 0xda, 0xff },
};
int tm6000_init (struct tm6000_core *dev)
{
- int board, rc=0, i;
+ int board, rc=0, i, size;
+ struct reg_init *tab;
+
+ if (dev->dev_type == TM6010) {
+ tab = tm6010_init_tab;
+ size = ARRAY_SIZE(tm6010_init_tab);
+ } else {
+ tab = tm6000_init_tab;
+ size = ARRAY_SIZE(tm6000_init_tab);
+ }
/* Load board's initialization table */
- for (i=0; i< ARRAY_SIZE(init_tab); i++) {
- rc= tm6000_set_reg (dev, REQ_07_SET_GET_AVREG,
- init_tab[i][0],init_tab[i][1]);
+ for (i=0; i< size; i++) {
+ rc= tm6000_set_reg (dev, tab[i].req, tab[i].reg, tab[i].val);
if (rc<0) {
- printk (KERN_ERR "Error %i while setting reg %d to value %d\n",
- rc, init_tab[i][0],init_tab[i][1]);
+ printk (KERN_ERR "Error %i while setting req %d, "
+ "reg %d to value %d\n", rc,
+ tab[i].req,tab[i].reg, tab[i].val);
return rc;
}
}
+ msleep(5); /* Just to be conservative */
+
/* Check board version - maybe 10Moons specific */
board=tm6000_get_reg16 (dev, 0x40, 0, 0);
if (board >=0) {
printk (KERN_ERR "Error %i while retrieving board version\n",board);
}
- tm6000_set_reg (dev, REQ_05_SET_GET_USBREG, 0x18, 0x00);
- msleep(5); /* Just to be conservative */
+ if (dev->dev_type == TM6010) {
+ /* Turn xceive 3028 on */
+ tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6010_GPIO_3, 0x01);
+ msleep(11);
+ }
/* Reset GPIO1 and GPIO4. */
for (i=0; i< 2; i++) {
- rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 0);
+ rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
+ dev->tuner_reset_gpio, 0x00);
if (rc<0) {
printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc);
return rc;
}
msleep(10); /* Just to be conservative */
- rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 1);
+ rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
+ dev->tuner_reset_gpio, 0x01);
if (rc<0) {
printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc);
return rc;
return rc;
}
- if (!i)
+ if (!i) {
rc=tm6000_get_reg16(dev, 0x40,0,0);
+ if (rc>=0) {
+ printk ("board=%d\n", rc);
+ }
+ }
}
msleep(50);