drm/amd/display: Add debug option to override DSC target bpp increment

[why]
It's required for debug purposes.

[how]
Add a dsc_bpp_increment_div debug option that overrides DPCD
BITS_PER_PIXEL_INCREMENT value. The value dsc_bpp_increment_div should
be set to is the one after parsing, i.e. it could be 1, 2, 4, 8 or 16
(meaning 1pix, 1/2pix, ..., 1/16pix).

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 4e6bad165c74714843340574c6380be0c51abd44..70e33ea8711abf2005606c0d2110144e9f5c7518 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4075,7 +4075,8 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
 
        if (aconnector->dc_link && sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT) {
 #if defined(CONFIG_DRM_AMD_DC_DCN)
-               dc_dsc_parse_dsc_dpcd(aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,
+               dc_dsc_parse_dsc_dpcd(aconnector->dc_link->ctx->dc,
+                                     aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,
                                      aconnector->dc_link->dpcd_caps.dsc_caps.dsc_ext_caps.raw,
                                      &dsc_caps);
 #endif

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 4c2ba93ab7e0153992cdd7136ffdd5aa544c28ec..039004344dc62de75db9462500f6e48e67945ca3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -367,6 +367,7 @@ struct dc_debug_options {
        bool disable_hubp_power_gate;
        bool disable_dsc_power_gate;
        int dsc_min_slice_height_override;
+       int dsc_bpp_increment_div;
        bool native422_support;
        bool disable_pplib_wm_range;
        enum wm_report_mode pplib_wm_report_mode;

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dsc.h b/drivers/gpu/drm/amd/display/dc/dc_dsc.h
index 7ece8eb5f48cf7beb078fb9a0b3cc3b640d39d45..3800340a5b4f62f3676f05239512315463bbdc19 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dsc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dsc.h
@@ -53,7 +53,8 @@ struct dc_dsc_policy {
        uint32_t min_target_bpp;
 };
 
-bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data,
+bool dc_dsc_parse_dsc_dpcd(const struct dc *dc,
+               const uint8_t *dpcd_dsc_basic_data,
                const uint8_t *dpcd_dsc_ext_data,
                struct dsc_dec_dpcd_caps *dsc_sink_caps);
 

diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
index 71b048363506553d08b1a32c5d4abf99c354f0c7..8b78fcbfe74691a84c4b091dddfa0fd6ef9c04ca 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
+++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
@@ -760,7 +760,7 @@ done:
        return is_dsc_possible;
 }
 
-bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data, const uint8_t *dpcd_dsc_ext_data, struct dsc_dec_dpcd_caps *dsc_sink_caps)
+bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const uint8_t *dpcd_dsc_basic_data, const uint8_t *dpcd_dsc_ext_data, struct dsc_dec_dpcd_caps *dsc_sink_caps)
 {
        if (!dpcd_dsc_basic_data)
                return false;
@@ -813,6 +813,23 @@ bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data, const uint8_t *dp
        if (!dsc_bpp_increment_div_from_dpcd(dpcd_dsc_basic_data[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT], &dsc_sink_caps->bpp_increment_div))
                return false;
 
+       if (dc->debug.dsc_bpp_increment_div) {
+               /* dsc_bpp_increment_div should onl be 1, 2, 4, 8 or 16, but rather than rejecting invalid values,
+                * we'll accept all and get it into range. This also makes the above check against 0 redundant,
+                * but that one stresses out the override will be only used if it's not 0.
+                */
+               if (dc->debug.dsc_bpp_increment_div >= 1)
+                       dsc_sink_caps->bpp_increment_div = 1;
+               if (dc->debug.dsc_bpp_increment_div >= 2)
+                       dsc_sink_caps->bpp_increment_div = 2;
+               if (dc->debug.dsc_bpp_increment_div >= 4)
+                       dsc_sink_caps->bpp_increment_div = 4;
+               if (dc->debug.dsc_bpp_increment_div >= 8)
+                       dsc_sink_caps->bpp_increment_div = 8;
+               if (dc->debug.dsc_bpp_increment_div >= 16)
+                       dsc_sink_caps->bpp_increment_div = 16;
+       }
+
        /* Extended caps */
        if (dpcd_dsc_ext_data == NULL) { // Extended DPCD DSC data can be null, e.g. because it doesn't apply to SST
                dsc_sink_caps->branch_overall_throughput_0_mps = 0;