]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
Microsemi PCIe expansion board DT entry.
authorDavid Abdurachmanov <david.abdurachmanov@sifive.com>
Tue, 28 Jan 2020 10:47:43 +0000 (02:47 -0800)
committerAndrea Righi <andrea.righi@canonical.com>
Thu, 9 Mar 2023 14:57:26 +0000 (15:57 +0100)
BugLink: https://bugs.launchpad.net/bugs/1910965
Rebased on v5.5 (no actual changes).

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Upstream-Status: Inappropriate [enable feature]
(backported from https://github.com/sifive/meta-sifive/blob/2020.11/recipes-kernel/linux/files/freedom-u540/0002-Microsemi-PCIe-expansion-board-DT-entry.patch)
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Andrea Righi <andrea.righi@canonical.com>
arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts [new file with mode: 0644]

diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts
new file mode 100644 (file)
index 0000000..4d25606
--- /dev/null
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include "hifive-unleashed-a00.dts"
+
+/ {
+       soc {
+               pcie: pcie@2030000000 {
+                       #address-cells = <0x3>;
+                       #interrupt-cells = <0x1>;
+                       #size-cells = <0x2>;
+                       compatible = "microsemi,ms-pf-axi-pcie-host";
+                       device_type = "pci";
+                       bus-range = <0x01 0x7f>;
+                       interrupt-map = <0 0 0 1 &ms_pcie_intc 0 0 0 0 2 &ms_pcie_intc 1 0 0 0 3 &ms_pcie_intc 2 0 0 0 4 &ms_pcie_intc 3>;
+                       interrupt-map-mask = <0 0 0 7>;
+                       interrupt-parent = <&plic0>;
+                       interrupts = <32>;
+                       ranges = <0x3000000 0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>;
+                       reg = <0x20 0x30000000 0x0 0x4000000 0x20 0x0 0x0 0x100000>;
+                       reg-names = "control", "apb";
+                       ms_pcie_intc: interrupt-controller {
+                               #address-cells = <0>;
+                               #interrupt-cells = <1>;
+                               interrupt-controller;
+                       };
+               };
+       };
+};