mfd: ti_am335x_tscadc: Add TSC prefix in certain macros

While the register list (and names) between ADC0 and ADC1 are pretty
close, the bits inside changed a little bit. To avoid any future
confusion, let's add the TSC prefix when some bits are in a register
that is common to both revisions of the ADC, but are specific to the
am33xx hardware.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20211015081506.933180-32-miquel.raynal@bootlin.com

diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
index a34ca378e82cd54fda5b0546a734c41b1344d20e..ffd52e021c2ced5c8e634783534b98afc14888df 100644 (file)
--- a/drivers/mfd/ti_am335x_tscadc.c
+++ b/drivers/mfd/ti_am335x_tscadc.c
@@ -222,13 +222,13 @@ static    int ti_tscadc_probe(struct platform_device *pdev)
         * of the CTRL register but not the subsystem enable bit which must be
         * added manually when timely.
         */
-       tscadc->ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
+       tscadc->ctrl = CNTRLREG_TSC_STEPCONFIGWRT | CNTRLREG_STEPID;
        if (tsc_wires > 0) {
-               tscadc->ctrl |= CNTRLREG_TSCENB;
+               tscadc->ctrl |= CNTRLREG_TSC_ENB;
                if (tsc_wires == 5)
-                       tscadc->ctrl |= CNTRLREG_5WIRE;
+                       tscadc->ctrl |= CNTRLREG_TSC_5WIRE;
                else
-                       tscadc->ctrl |= CNTRLREG_4WIRE;
+                       tscadc->ctrl |= CNTRLREG_TSC_4WIRE;
        }
        regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
 
@@ -328,7 +328,7 @@ static const struct ti_tscadc_data tscdata = {
        .adc_feature_compatible = "ti,am3359-adc",
        .secondary_feature_name = "TI-am335x-tsc",
        .secondary_feature_compatible = "ti,am3359-tsc",
-       .target_clk_rate = ADC_CLK,
+       .target_clk_rate = TSC_ADC_CLK,
 };
 
 static const struct of_device_id ti_tscadc_dt_ids[] = {

diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h
index 860289ae85161ceebad6a41a694a7a489cc0cb5f..cc6de9258455173624dbf4357ec6de7995817b5d 100644 (file)
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -98,13 +98,13 @@
 /* Control register */
 #define CNTRLREG_SSENB         BIT(0)
 #define CNTRLREG_STEPID                BIT(1)
-#define CNTRLREG_STEPCONFIGWRT BIT(2)
+#define CNTRLREG_TSC_STEPCONFIGWRT BIT(2)
 #define CNTRLREG_POWERDOWN     BIT(4)
-#define CNTRLREG_AFE_CTRL(val) FIELD_PREP(GENMASK(6, 5), (val))
-#define CNTRLREG_4WIRE         CNTRLREG_AFE_CTRL(1)
-#define CNTRLREG_5WIRE         CNTRLREG_AFE_CTRL(2)
-#define CNTRLREG_8WIRE         CNTRLREG_AFE_CTRL(3)
-#define CNTRLREG_TSCENB                BIT(7)
+#define CNTRLREG_TSC_AFE_CTRL(val) FIELD_PREP(GENMASK(6, 5), (val))
+#define CNTRLREG_TSC_4WIRE     CNTRLREG_TSC_AFE_CTRL(1)
+#define CNTRLREG_TSC_5WIRE     CNTRLREG_TSC_AFE_CTRL(2)
+#define CNTRLREG_TSC_8WIRE     CNTRLREG_TSC_AFE_CTRL(3)
+#define CNTRLREG_TSC_ENB       BIT(7)
 
 /* FIFO READ Register */
 #define FIFOREAD_DATA_MASK     GENMASK(11, 0)
@@ -118,7 +118,7 @@
 #define SEQ_STATUS             BIT(5)
 #define CHARGE_STEP            0x11
 
-#define ADC_CLK                        (3 * HZ_PER_MHZ)
+#define TSC_ADC_CLK            (3 * HZ_PER_MHZ)
 #define TOTAL_STEPS            16
 #define TOTAL_CHANNELS         8
 #define FIFO1_THRESHOLD                19