dt-bindings: power: Add MT8192 power domains

Add power domains dt-bindings for MT8192.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201030113622.201188-15-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index 8cae434123277a5ff970fc6f2f870f2cd9f38d8f..fd12bafe354879bed271de7384f90d3bd7c6a459 100644 (file)
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -25,6 +25,7 @@ properties:
     enum:
       - mediatek,mt8173-power-controller
       - mediatek,mt8183-power-controller
+      - mediatek,mt8192-power-controller
 
   '#power-domain-cells':
     const: 1
@@ -60,6 +61,7 @@ patternProperties:
           Power domain index. Valid values are defined in:
               "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.
               "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
+              "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
         maxItems: 1
 
       clocks:

diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h
new file mode 100644 (file)
index 0000000..4eaa53d
--- /dev/null
+++ b/include/dt-bindings/power/mt8192-power.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Weiyi Lu <weiyi.lu@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8192_POWER_H
+#define _DT_BINDINGS_POWER_MT8192_POWER_H
+
+#define MT8192_POWER_DOMAIN_AUDIO      0
+#define MT8192_POWER_DOMAIN_CONN       1
+#define MT8192_POWER_DOMAIN_MFG0       2
+#define MT8192_POWER_DOMAIN_MFG1       3
+#define MT8192_POWER_DOMAIN_MFG2       4
+#define MT8192_POWER_DOMAIN_MFG3       5
+#define MT8192_POWER_DOMAIN_MFG4       6
+#define MT8192_POWER_DOMAIN_MFG5       7
+#define MT8192_POWER_DOMAIN_MFG6       8
+#define MT8192_POWER_DOMAIN_DISP       9
+#define MT8192_POWER_DOMAIN_IPE                10
+#define MT8192_POWER_DOMAIN_ISP                11
+#define MT8192_POWER_DOMAIN_ISP2       12
+#define MT8192_POWER_DOMAIN_MDP                13
+#define MT8192_POWER_DOMAIN_VENC       14
+#define MT8192_POWER_DOMAIN_VDEC       15
+#define MT8192_POWER_DOMAIN_VDEC2      16
+#define MT8192_POWER_DOMAIN_CAM                17
+#define MT8192_POWER_DOMAIN_CAM_RAWA   18
+#define MT8192_POWER_DOMAIN_CAM_RAWB   19
+#define MT8192_POWER_DOMAIN_CAM_RAWC   20
+
+#endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */