]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commitdiff
arm64: KVM: Remove all traces of the ThumbEE registers
authorWill Deacon <will.deacon@arm.com>
Tue, 15 Sep 2015 16:15:33 +0000 (17:15 +0100)
committerMarc Zyngier <marc.zyngier@arm.com>
Thu, 17 Sep 2015 12:13:26 +0000 (13:13 +0100)
Although the ThumbEE registers and traps were present in earlier
versions of the v8 architecture, it was retrospectively removed and so
we can do the same.

Whilst this breaks migrating a guest started on a previous version of
the kernel, it is much better to kill these (non existent) registers
as soon as possible.

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
[maz: added commend about migration]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm64/include/asm/kvm_arm.h
arch/arm64/include/asm/kvm_asm.h
arch/arm64/kvm/hyp.S
arch/arm64/kvm/sys_regs.c

index cbc5e1a0ea8f7debc8704fd2ce16168a3bafe782..9694f26545930bf5cf282cde42d41035914d89b7 100644 (file)
 #define VTTBR_VMID_MASK          (UL(0xFF) << VTTBR_VMID_SHIFT)
 
 /* Hyp System Trap Register */
-#define HSTR_EL2_TTEE  (1 << 16)
 #define HSTR_EL2_T(x)  (1 << x)
 
 /* Hyp Coproccessor Trap Register Shifts */
index 67fa0de3d48324cc19a06871904f619189ed27da..5e377101f91948f9ee711bea3f7659c86010301c 100644 (file)
@@ -53,9 +53,7 @@
 #define        IFSR32_EL2      25      /* Instruction Fault Status Register */
 #define        FPEXC32_EL2     26      /* Floating-Point Exception Control Register */
 #define        DBGVCR32_EL2    27      /* Debug Vector Catch Register */
-#define        TEECR32_EL1     28      /* ThumbEE Configuration Register */
-#define        TEEHBR32_EL1    29      /* ThumbEE Handler Base Register */
-#define        NR_SYS_REGS     30
+#define        NR_SYS_REGS     28
 
 /* 32bit mapping */
 #define c0_MPIDR       (MPIDR_EL1 * 2) /* MultiProcessor ID Register */
index 60a83e2900a7bbe54d9266d2e85d832bc5300608..85634777e1604714e3081a6b24f83bd28ff618a1 100644 (file)
        mrs     x5, ifsr32_el2
        stp     x4, x5, [x3]
 
-       skip_fpsimd_state x8, 3f
+       skip_fpsimd_state x8, 2f
        mrs     x6, fpexc32_el2
        str     x6, [x3, #16]
-3:
-       skip_debug_state x8, 2f
+2:
+       skip_debug_state x8, 1f
        mrs     x7, dbgvcr32_el2
        str     x7, [x3, #24]
-2:
-       skip_tee_state x8, 1f
-
-       add     x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
-       mrs     x4, teecr32_el1
-       mrs     x5, teehbr32_el1
-       stp     x4, x5, [x3]
 1:
 .endm
 
        msr     dacr32_el2, x4
        msr     ifsr32_el2, x5
 
-       skip_debug_state x8, 2f
+       skip_debug_state x8, 1f
        ldr     x7, [x3, #24]
        msr     dbgvcr32_el2, x7
-2:
-       skip_tee_state x8, 1f
-
-       add     x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
-       ldp     x4, x5, [x3]
-       msr     teecr32_el1, x4
-       msr     teehbr32_el1, x5
 1:
 .endm
 
index 1d0463e6a9e3d9200d5e6682c3d84abbad13804e..d03d3af17e7eef784d528479e2f4fed305ee5f75 100644 (file)
@@ -539,13 +539,6 @@ static const struct sys_reg_desc sys_reg_descs[] = {
        { Op0(0b10), Op1(0b000), CRn(0b0111), CRm(0b1110), Op2(0b110),
          trap_dbgauthstatus_el1 },
 
-       /* TEECR32_EL1 */
-       { Op0(0b10), Op1(0b010), CRn(0b0000), CRm(0b0000), Op2(0b000),
-         NULL, reset_val, TEECR32_EL1, 0 },
-       /* TEEHBR32_EL1 */
-       { Op0(0b10), Op1(0b010), CRn(0b0001), CRm(0b0000), Op2(0b000),
-         NULL, reset_val, TEEHBR32_EL1, 0 },
-
        /* MDCCSR_EL1 */
        { Op0(0b10), Op1(0b011), CRn(0b0000), CRm(0b0001), Op2(0b000),
          trap_raz_wi },