}
break;
+ case INDEX_op_deposit_i32:
+ tcg_out32 (s, RLWIMI
+ | RA (args[0])
+ | RS (args[2])
+ | SH (args[3])
+ | MB (32 - args[3] - args[4])
+ | ME (31 - args[3])
+ );
+ break;
+
default:
tcg_dump_ops (s, stderr);
tcg_abort ();
{ INDEX_op_ext16s_i32, { "r", "r" } },
{ INDEX_op_ext16u_i32, { "r", "r" } },
+ { INDEX_op_deposit_i32, { "r", "0", "r" } },
+
{ -1 },
};
#define TCG_TARGET_HAS_eqv_i32 1
#define TCG_TARGET_HAS_nand_i32 1
#define TCG_TARGET_HAS_nor_i32 1
-#define TCG_TARGET_HAS_deposit_i32 0
+#define TCG_TARGET_HAS_deposit_i32 1
#define TCG_AREG0 TCG_REG_R27