arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes

TSENS is part of GCC, hence add TSENS properties as part of GCC node.
Also add thermal zones and qfprom nodes.
Update GCC bindings doc to mention the possibility of optional TSENS
properties that can be part of GCC node.

Cc: Andy Gross <agross@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
index 152dfaab2575dc92b7d8ae97ce49282704219a6e..7d085f9690ccaf8c1f99842f978071d01148b4e0 100644 (file)
--- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
@@ -19,6 +19,11 @@ Required properties :
 - #reset-cells : shall contain 1
 
 Optional properties :
+- Qualcomm TSENS (thermal sensor device) on some devices can
+be part of GCC and hence the TSENS properties can also be
+part of the GCC/clock-controller node.
+For more details on the TSENS properties please refer
+Documentation/devicetree/bindings/thermal/qcom-tsens.txt
 - #power-domain-cells : shall contain 1
 
 Example:
@@ -29,3 +34,16 @@ Example:
                #reset-cells = <1>;
                #power-domain-cells = <1>;
        };
+
+Example of GCC with TSENS properties:
+       clock-controller@900000 {
+               compatible = "qcom,gcc-apq8064";
+               reg = <0x00900000 0x4000>;
+               nvmem-cells = <&tsens_calib>, <&tsens_backup>;
+               nvmem-cell-names = "calib", "calib_backup";
+               qcom,tsens-slopes = <1176 1176 1154 1176 1111
+                               1132 1132 1199 1132 1199 1132>;
+               #clock-cells = <1>;
+               #reset-cells = <1>;
+               #thermal-sensor-cells = <1>;
+       };

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 17f671f14c303187ace72824d846ca29f1ed8157..2539df788334ee19af08055328e1cab2433f6994 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -228,6 +228,88 @@
                };
        };
 
+       thermal-zones {
+               cpu-thermal0 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&gcc 7>;
+
+                       trips {
+                               cpu_alert0: trip@0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+                               cpu_crit0: trip@1 {
+                                       temperature = <95000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               cpu-thermal1 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&gcc 8>;
+
+                       trips {
+                               cpu_alert1: trip@0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+                               cpu_crit1: trip@1 {
+                                       temperature = <95000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               cpu-thermal2 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&gcc 9>;
+
+                       trips {
+                               cpu_alert2: trip@0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+                               cpu_crit2: trip@1 {
+                                       temperature = <95000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               cpu-thermal3 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&gcc 10>;
+
+                       trips {
+                               cpu_alert3: trip@0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+                               cpu_crit3: trip@1 {
+                                       temperature = <95000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+       };
+
        cpu-pmu {
                compatible = "qcom,krait-pmu";
                interrupts = <1 10 0x304>;
@@ -1130,11 +1212,30 @@
                        };
                };
 
+               qfprom: qfprom@00700000 {
+                       compatible      = "qcom,qfprom";
+                       reg             = <0x00700000 0x1000>;
+                       #address-cells  = <1>;
+                       #size-cells     = <1>;
+                       ranges;
+                       tsens_calib: calib {
+                               reg = <0x404 0x10>;
+                       };
+                       tsens_backup: backup_calib {
+                               reg = <0x414 0x10>;
+                       };
+               };
+
                gcc: clock-controller@900000 {
                        compatible = "qcom,gcc-apq8064";
                        reg = <0x00900000 0x4000>;
+                       nvmem-cells = <&tsens_calib>, <&tsens_backup>;
+                       nvmem-cell-names = "calib", "calib_backup";
+                       qcom,tsens-slopes = <1176 1176 1154 1176 1111
+                               1132 1132 1199 1132 1199 1132>;
                        #clock-cells = <1>;
                        #reset-cells = <1>;
+                       #thermal-sensor-cells = <1>;
                };
 
                lcc: clock-controller@28000000 {