scsi: arm64: dts: add ufs dts node

arm64: dts: add ufs node for Hisilicon.

Signed-off-by: Li Wei <liwei213@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8d477dcbfa5822c4b037cee7e187bd27ee045f04..851190a719ea9de4d0dbc663721a915ca92516fa 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1000,6 +1000,24 @@
                        reset-gpios = <&gpio11 1 0 >;
                };
 
+               /* UFS */
+               ufs: ufs@ff3b0000 {
+                       compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
+                       /* 0: HCI standard */
+                       /* 1: UFS SYS CTRL */
+                       reg = <0x0 0xff3b0000 0x0 0x1000>,
+                               <0x0 0xff3b1000 0x0 0x1000>;
+                       interrupt-parent = <&gic>;
+                       interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
+                               <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
+                       clock-names = "ref_clk", "phy_clk";
+                       freq-table-hz = <0 0>, <0 0>;
+                       /* offset: 0x84; bit: 12 */
+                       resets = <&crg_rst 0x84 12>;
+                       reset-names = "rst";
+               };
+
                /* SD */
                dwmmc1: dwmmc1@ff37f000 {
                        #address-cells = <1>;