Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

Pull x86 core platform updates from Ingo Molnar:
 "The main changes are:

   - Intel Atom platform updates.  (Andy Shevchenko)

   - modularity fixlets.  (Paul Gortmaker)

   - x86 platform clockevents driver updates for lguest, uv and Xen.
     (Viresh Kumar)

   - Microsoft Hyper-V TSC fixlet.  (Vitaly Kuznetsov)"

* 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/platform: Make atom/pmc_atom.c explicitly non-modular
  x86/hyperv: Mark the Hyper-V TSC as unstable
  x86/xen/time: Migrate to new set-state interface
  x86/uv/time: Migrate to new set-state interface
  x86/lguest/timer: Migrate to new set-state interface
  x86/pci/intel_mid_pci: Use proper constants for irq polarity
  x86/pci/intel_mid_pci: Make intel_mid_pci_ops static
  x86/pci/intel_mid_pci: Propagate actual return code
  x86/pci/intel_mid_pci: Work around for IRQ0 assignment
  x86/platform/iosf_mbi: Add Intel Tangier PCI id
  x86/platform/iosf_mbi: Source cleanup
  x86/platform/iosf_mbi: Remove NULL pointer checks for pci_dev_put()
  x86/platform/iosf_mbi: Check return value of debugfs_create properly
  x86/platform/iosf_mbi: Move to dedicated folder
  x86/platform/intel/pmc_atom: Move the PMC-Atom code to arch/x86/platform/atom
  x86/platform/intel/pmc_atom: Add Cherrytrail PMC interface
  x86/platform/intel/pmc_atom: Supply register mappings via PMC object
  x86/platform/intel/pmc_atom: Print index of device in loop
  x86/platform/intel/pmc_atom: Export accessors to PMC registers

diff --combined arch/x86/kernel/Makefile
index 514064897d55178254987c9f9624525f558d5976,7041f8b5161b6b14b4b0c7ee0aac98b2c2855474..3c362217634005f137434abe5420cae7cd8b7e5b
--- 1/arch/x86/kernel/Makefile
--- 2/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@@ -23,10 -23,8 +23,10 @@@ KASAN_SANITIZE_dumpstack_$(BITS).o := 
  CFLAGS_irq.o := -I$(src)/../include/asm/trace
  
  obj-y                 := process_$(BITS).o signal.o
 +obj-$(CONFIG_COMPAT)  += signal_compat.o
  obj-y                 += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
 -obj-y                 += time.o ioport.o ldt.o dumpstack.o nmi.o
 +obj-y                 += time.o ioport.o dumpstack.o nmi.o
 +obj-$(CONFIG_MODIFY_LDT_SYSCALL)      += ldt.o
  obj-y                 += setup.o x86_init.o i8259.o irqinit.o jump_label.o
  obj-$(CONFIG_IRQ_WORK)  += irq_work.o
  obj-y                 += probe_roms.o
@@@ -109,8 -107,6 +109,6 @@@ obj-$(CONFIG_EFI)                  += sysfb_efi.
  
  obj-$(CONFIG_PERF_EVENTS)             += perf_regs.o
  obj-$(CONFIG_TRACING)                 += tracepoint.o
- obj-$(CONFIG_IOSF_MBI)                        += iosf_mbi.o
- obj-$(CONFIG_PMC_ATOM)                        += pmc_atom.o
  
  ###
  # 64 bit specific files

diff --combined arch/x86/kernel/cpu/mshyperv.c
index f794bfa3c1383c2d9ac1bb3c2ec384fb0d0db52c,6fd023d7492d83b90e1f970285b159e1b7abe0f1..381c8b9b3a33570fcf88b82fa69d1fc43298d89f
--- 1/arch/x86/kernel/cpu/mshyperv.c
--- 2/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@@ -18,7 -18,6 +18,7 @@@
  #include <linux/efi.h>
  #include <linux/interrupt.h>
  #include <linux/irq.h>
 +#include <linux/kexec.h>
  #include <asm/processor.h>
  #include <asm/hypervisor.h>
  #include <asm/hyperv.h>
@@@ -29,14 -28,10 +29,14 @@@
  #include <asm/i8259.h>
  #include <asm/apic.h>
  #include <asm/timer.h>
 +#include <asm/reboot.h>
  
  struct ms_hyperv_info ms_hyperv;
  EXPORT_SYMBOL_GPL(ms_hyperv);
  
 +static void (*hv_kexec_handler)(void);
 +static void (*hv_crash_handler)(struct pt_regs *regs);
 +
  #if IS_ENABLED(CONFIG_HYPERV)
  static void (*vmbus_handler)(void);
  
@@@ -72,47 -67,8 +72,47 @@@ void hv_remove_vmbus_irq(void
  }
  EXPORT_SYMBOL_GPL(hv_setup_vmbus_irq);
  EXPORT_SYMBOL_GPL(hv_remove_vmbus_irq);
 +
 +void hv_setup_kexec_handler(void (*handler)(void))
 +{
 +      hv_kexec_handler = handler;
 +}
 +EXPORT_SYMBOL_GPL(hv_setup_kexec_handler);
 +
 +void hv_remove_kexec_handler(void)
 +{
 +      hv_kexec_handler = NULL;
 +}
 +EXPORT_SYMBOL_GPL(hv_remove_kexec_handler);
 +
 +void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
 +{
 +      hv_crash_handler = handler;
 +}
 +EXPORT_SYMBOL_GPL(hv_setup_crash_handler);
 +
 +void hv_remove_crash_handler(void)
 +{
 +      hv_crash_handler = NULL;
 +}
 +EXPORT_SYMBOL_GPL(hv_remove_crash_handler);
  #endif
  
 +static void hv_machine_shutdown(void)
 +{
 +      if (kexec_in_progress && hv_kexec_handler)
 +              hv_kexec_handler();
 +      native_machine_shutdown();
 +}
 +
 +static void hv_machine_crash_shutdown(struct pt_regs *regs)
 +{
 +      if (hv_crash_handler)
 +              hv_crash_handler(regs);
 +      native_machine_crash_shutdown(regs);
 +}
 +
 +
  static uint32_t  __init ms_hyperv_platform(void)
  {
        u32 eax;
@@@ -158,7 -114,6 +158,7 @@@ static void __init ms_hyperv_init_platf
         * Extract the features and hints
         */
        ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
 +      ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
        ms_hyperv.hints    = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
  
        printk(KERN_INFO "HyperV: features 0x%x, hints 0x%x\n",
@@@ -186,8 -141,7 +186,9 @@@
        no_timer_check = 1;
  #endif
  
 +      machine_ops.shutdown = hv_machine_shutdown;
 +      machine_ops.crash_shutdown = hv_machine_crash_shutdown;
+       mark_tsc_unstable("running on Hyper-V");
  }
  
  const __refconst struct hypervisor_x86 x86_hyper_ms_hyperv = {

diff --combined arch/x86/pci/intel_mid_pci.c
index 22aaefb4f1cadf5bc136b4a72af08939fc4aae30,8b93e634af84c4698e6f7c6ab718a018e2cdc9db..0d24e7c101454057f432dd976ea7e3d537e0a38c
--- 1/arch/x86/pci/intel_mid_pci.c
--- 2/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@@ -35,6 -35,9 +35,9 @@@
  
  #define PCIE_CAP_OFFSET       0x100
  
+ /* Quirks for the listed devices */
+ #define PCI_DEVICE_ID_INTEL_MRFL_MMC  0x1190
+ 
  /* Fixed BAR fields */
  #define PCIE_VNDR_CAP_ID_FIXED_BAR 0x00       /* Fixed BAR (TBD) */
  #define PCI_FIXED_BAR_0_SIZE  0x04
@@@ -210,22 -213,41 +213,41 @@@ static int intel_mid_pci_irq_enable(str
  {
        struct irq_alloc_info info;
        int polarity;
+       int ret;
  
 -      if (dev->irq_managed && dev->irq > 0)
 +      if (pci_has_managed_irq(dev))
                return 0;
  
-       if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER)
-               polarity = 0; /* active high */
-       else
-               polarity = 1; /* active low */
+       switch (intel_mid_identify_cpu()) {
+       case INTEL_MID_CPU_CHIP_TANGIER:
+               polarity = IOAPIC_POL_HIGH;
+ 
+               /* Special treatment for IRQ0 */
+               if (dev->irq == 0) {
+                       /*
+                        * TNG has IRQ0 assigned to eMMC controller. But there
+                        * are also other devices with bogus PCI configuration
+                        * that have IRQ0 assigned. This check ensures that
+                        * eMMC gets it.
+                        */
+                       if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC)
+                               return -EBUSY;
+               }
+               break;
+       default:
+               polarity = IOAPIC_POL_LOW;
+               break;
+       }
+ 
        ioapic_set_alloc_attr(&info, dev_to_node(&dev->dev), 1, polarity);
  
        /*
         * MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
         * IOAPIC RTE entries, so we just enable RTE for the device.
         */
-       if (mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC, &info) < 0)
-               return -EBUSY;
+       ret = mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC, &info);
+       if (ret < 0)
+               return ret;
  
        dev->irq_managed = 1;
  
@@@ -234,17 -256,14 +256,17 @@@
  
  static void intel_mid_pci_irq_disable(struct pci_dev *dev)
  {
 -      if (!mp_should_keep_irq(&dev->dev) && dev->irq_managed &&
 -          dev->irq > 0) {
 +      if (pci_has_managed_irq(dev)) {
                mp_unmap_irq(dev->irq);
                dev->irq_managed = 0;
 +              /*
 +               * Don't reset dev->irq here, otherwise
 +               * intel_mid_pci_irq_enable() will fail on next call.
 +               */
        }
  }
  
- struct pci_ops intel_mid_pci_ops = {
+ static struct pci_ops intel_mid_pci_ops = {
        .read = pci_read,
        .write = pci_write,
  };