]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/commitdiff
drm/i915: Enable voltage swing before enabling DDI_BUF_CTL.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 29 Aug 2017 23:22:26 +0000 (16:22 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 31 Aug 2017 16:30:07 +0000 (09:30 -0700)
Sequences for DisplayPort asks us to
" Configure voltage swing and related IO settings.
Refer to DDI Buffer section."

before "Configure and enable DDI_BUF_CTL"

On BXT and CNL this means to execute the ddi vswing sequences.

At this point these sequences calls are getting duplicated for DP
because they are all called from DP link trainning sequences.

However this patch is not yet removing it before a futher discussion
since spec also allows that during link training without disabling
anything:

"
Notes
Changing voltage swing during link training:
Change the swing setting following the DDI Buffer section.
The port does not need to be disabled.
"

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170829232230.23051-4-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/intel_ddi.c

index eedd29487e0b261ac1433f5b4292e930a1fe570e..506782c1a62a0b8169622dc6abd58248a4774db2 100644 (file)
@@ -2136,6 +2136,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        enum port port = intel_ddi_get_encoder_port(encoder);
        struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
+       uint32_t level = intel_ddi_dp_level(intel_dp);
 
        WARN_ON(link_mst && (port == PORT_A || port == PORT_E));
 
@@ -2148,7 +2149,11 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
 
        intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain);
 
-       if (!IS_GEN9_LP(dev_priv) && !IS_CANNONLAKE(dev_priv))
+       if (IS_CANNONLAKE(dev_priv))
+               cnl_ddi_vswing_sequence(encoder, level);
+       else if (IS_GEN9_LP(dev_priv))
+               bxt_ddi_vswing_sequence(dev_priv, level, port, encoder->type);
+       else
                intel_prepare_dp_ddi_buffers(encoder);
 
        intel_ddi_init_dp_buf_reg(encoder);