Backend vector enhancements
Dynamic tlb resizing
# gpg: Signature made Mon 28 Jan 2019 15:57:19 GMT
# gpg: using RSA key
64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-
20190128: (23 commits)
cputlb: Remove static tlb sizing
tcg/tci: enable dynamic TLB sizing
tcg/mips: enable dynamic TLB sizing
tcg/mips: Fix tcg_out_qemu_ld_slow_path
tcg/arm: enable dynamic TLB sizing
tcg/riscv: enable dynamic TLB sizing
tcg/s390: enable dynamic TLB sizing
tcg/sparc: enable dynamic TLB sizing
tcg/ppc: enable dynamic TLB sizing
tcg/aarch64: enable dynamic TLB sizing
tcg/i386: enable dynamic TLB sizing
tcg: introduce dynamic TLB sizing
cputlb: do not evict empty entries to the vtlb
tcg/aarch64: Implement vector minmax arithmetic
tcg/aarch64: Implement vector saturating arithmetic
tcg/i386: Implement vector minmax arithmetic
tcg/i386: Implement vector saturating arithmetic
tcg/i386: Split subroutines out of tcg_expand_vec_op
tcg: Add opcodes for vector minmax arithmetic
tcg: Add opcodes for vector saturated arithmetic
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>