u32 addr;
u32 len;
} read_reg;
+ struct {
+ u8 bit;
+ } dm_cap;
};
};
+static const char * const rtw_dm_cap_strs[] = {
+ [RTW_DM_CAP_NA] = "NA",
+ [RTW_DM_CAP_TXGAPK] = "TXGAPK",
+};
+
static int rtw_debugfs_single_show(struct seq_file *m, void *v)
{
struct rtw_debugfs_priv *debugfs_priv = m->private;
return 0;
}
+static ssize_t rtw_debugfs_set_dm_cap(struct file *filp,
+ const char __user *buffer,
+ size_t count, loff_t *loff)
+{
+ struct seq_file *seqpriv = (struct seq_file *)filp->private_data;
+ struct rtw_debugfs_priv *debugfs_priv = seqpriv->private;
+ struct rtw_dev *rtwdev = debugfs_priv->rtwdev;
+ struct rtw_dm_info *dm_info = &rtwdev->dm_info;
+ int bit;
+ bool en;
+
+ if (kstrtoint_from_user(buffer, count, 10, &bit))
+ return -EINVAL;
+
+ en = bit > 0;
+ bit = abs(bit);
+
+ if (bit >= RTW_DM_CAP_NUM) {
+ rtw_warn(rtwdev, "unknown DM CAP %d\n", bit);
+ return -EINVAL;
+ }
+
+ if (en)
+ dm_info->dm_flags &= ~BIT(bit);
+ else
+ dm_info->dm_flags |= BIT(bit);
+
+ debugfs_priv->dm_cap.bit = bit;
+
+ return count;
+}
+
+static void dump_gapk_status(struct rtw_dev *rtwdev, struct seq_file *m)
+{
+ struct rtw_dm_info *dm_info = &rtwdev->dm_info;
+ struct rtw_gapk_info *txgapk = &rtwdev->dm_info.gapk;
+ int i, path;
+ u32 val;
+
+ seq_printf(m, "\n(%2d) %c%s\n\n", RTW_DM_CAP_TXGAPK,
+ dm_info->dm_flags & BIT(RTW_DM_CAP_TXGAPK) ? '-' : '+',
+ rtw_dm_cap_strs[RTW_DM_CAP_TXGAPK]);
+
+ for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
+ val = rtw_read_rf(rtwdev, path, RF_GAINTX, RFREG_MASK);
+ seq_printf(m, "path %d:\n0x%x = 0x%x\n", path, RF_GAINTX, val);
+
+ for (i = 0; i < RF_HW_OFFSET_NUM; i++)
+ seq_printf(m, "[TXGAPK] offset %d %d\n",
+ txgapk->rf3f_fs[path][i], i);
+ seq_puts(m, "\n");
+ }
+}
+
+static int rtw_debugfs_get_dm_cap(struct seq_file *m, void *v)
+{
+ struct rtw_debugfs_priv *debugfs_priv = m->private;
+ struct rtw_dev *rtwdev = debugfs_priv->rtwdev;
+ struct rtw_dm_info *dm_info = &rtwdev->dm_info;
+ int i;
+
+ switch (debugfs_priv->dm_cap.bit) {
+ case RTW_DM_CAP_TXGAPK:
+ dump_gapk_status(rtwdev, m);
+ break;
+ default:
+ for (i = 1; i < RTW_DM_CAP_NUM; i++) {
+ seq_printf(m, "(%2d) %c%s\n", i,
+ dm_info->dm_flags & BIT(i) ? '-' : '+',
+ rtw_dm_cap_strs[i]);
+ }
+ break;
+ }
+ debugfs_priv->dm_cap.bit = RTW_DM_CAP_NA;
+ return 0;
+}
+
#define rtw_debug_impl_mac(page, addr) \
static struct rtw_debugfs_priv rtw_debug_priv_mac_ ##page = { \
.cb_read = rtw_debug_get_mac_page, \
.cb_read = rtw_debugfs_get_fw_crash,
};
+static struct rtw_debugfs_priv rtw_debug_priv_dm_cap = {
+ .cb_write = rtw_debugfs_set_dm_cap,
+ .cb_read = rtw_debugfs_get_dm_cap,
+};
+
#define rtw_debugfs_add_core(name, mode, fopname, parent) \
do { \
rtw_debug_priv_ ##name.rtwdev = rtwdev; \
rtw_debugfs_add_r(rf_dump);
rtw_debugfs_add_r(tx_pwr_tbl);
rtw_debugfs_add_rw(fw_crash);
+ rtw_debugfs_add_rw(dm_cap);
}
#endif /* CONFIG_RTW88_DEBUGFS */
}
v = txgapk->rf3f_bp[band][i][path];
- if (_rtw8822c_txgapk_gain_valid(rtwdev, v))
+ if (_rtw8822c_txgapk_gain_valid(rtwdev, v)) {
rtw_dbg(rtwdev, RTW_DBG_RFK,
"[TXGAPK] tx_gain=0x%03X >= 0xCEX\n",
txgapk->rf3f_bp[band][i][path]);
- else
+ } else {
+ txgapk->rf3f_fs[path][i] = offset_tmp[i];
rtw_dbg(rtwdev, RTW_DBG_RFK,
"[TXGAPK] offset %d %d\n",
offset_tmp[i], i);
+ }
}
rtw_write_rf(rtwdev, path, RF_LUTWE2, RFREG_MASK, 0x10000);
u8 path, band, gain, rf0_idx;
u32 rf18, v;
+ if (rtwdev->dm_info.dm_flags & BIT(RTW_DM_CAP_TXGAPK))
+ return;
+
rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__);
if (txgapk->read_txgain == 1) {
static void rtw8822c_do_gapk(struct rtw_dev *rtwdev)
{
+ struct rtw_dm_info *dm = &rtwdev->dm_info;
+
+ if (dm->dm_flags & BIT(RTW_DM_CAP_TXGAPK)) {
+ rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] feature disable!!!\n");
+ return;
+ }
rtw8822c_rfk_handshake(rtwdev, true);
rtw8822c_txgapk(rtwdev);
rtw8822c_rfk_handshake(rtwdev, false);