net: bcmgenet: Add support for 7712 16nm internal EPHY

The 16nm internal EPHY that is present in 7712 is actually a 16nm
Gigabit PHY which has been forced to operate in 10/100 mode. Its
controls are therefore via the EXT_GPHY_CTRL registers and not via the
EXT_EPHY_CTRL which are used for all GENETv5 adapters. Add a match on
the 7712 compatible string to allow that differentiation to happen.

On previous GENETv4 chips the EXT_CFG_IDDQ_GLOBAL_PWR bit was cleared by
default, but this is not the case with this chip, so we need to make
sure we clear it to power on the EPHY.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
index 5da9c00b43b1533312af25dd4664b372233df289..226f4403cfed3cda2a35bf712c01c407107b4565 100644 (file)
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
@@ -1653,7 +1653,7 @@ static int bcmgenet_power_down(struct bcmgenet_priv *priv,
                /* Power down LED */
                if (priv->hw_params->flags & GENET_HAS_EXT) {
                        reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT);
-                       if (GENET_IS_V5(priv))
+                       if (GENET_IS_V5(priv) && !priv->ephy_16nm)
                                reg |= EXT_PWR_DOWN_PHY_EN |
                                       EXT_PWR_DOWN_PHY_RD |
                                       EXT_PWR_DOWN_PHY_SD |
@@ -1690,7 +1690,7 @@ static void bcmgenet_power_up(struct bcmgenet_priv *priv,
        case GENET_POWER_PASSIVE:
                reg &= ~(EXT_PWR_DOWN_DLL | EXT_PWR_DOWN_BIAS |
                         EXT_ENERGY_DET_MASK);
-               if (GENET_IS_V5(priv)) {
+               if (GENET_IS_V5(priv) && !priv->ephy_16nm) {
                        reg &= ~(EXT_PWR_DOWN_PHY_EN |
                                 EXT_PWR_DOWN_PHY_RD |
                                 EXT_PWR_DOWN_PHY_SD |
@@ -3910,6 +3910,7 @@ static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv)
 struct bcmgenet_plat_data {
        enum bcmgenet_version version;
        u32 dma_max_burst_length;
+       bool ephy_16nm;
 };
 
 static const struct bcmgenet_plat_data v1_plat_data = {
@@ -3942,6 +3943,12 @@ static const struct bcmgenet_plat_data bcm2711_plat_data = {
        .dma_max_burst_length = 0x08,
 };
 
+static const struct bcmgenet_plat_data bcm7712_plat_data = {
+       .version = GENET_V5,
+       .dma_max_burst_length = DMA_MAX_BURST_LENGTH,
+       .ephy_16nm = true,
+};
+
 static const struct of_device_id bcmgenet_match[] = {
        { .compatible = "brcm,genet-v1", .data = &v1_plat_data },
        { .compatible = "brcm,genet-v2", .data = &v2_plat_data },
@@ -3949,6 +3956,7 @@ static const struct of_device_id bcmgenet_match[] = {
        { .compatible = "brcm,genet-v4", .data = &v4_plat_data },
        { .compatible = "brcm,genet-v5", .data = &v5_plat_data },
        { .compatible = "brcm,bcm2711-genet-v5", .data = &bcm2711_plat_data },
+       { .compatible = "brcm,bcm7712-genet-v5", .data = &bcm7712_plat_data },
        { },
 };
 MODULE_DEVICE_TABLE(of, bcmgenet_match);
@@ -4029,6 +4037,7 @@ static int bcmgenet_probe(struct platform_device *pdev)
        if (pdata) {
                priv->version = pdata->version;
                priv->dma_max_burst_length = pdata->dma_max_burst_length;
+               priv->ephy_16nm = pdata->ephy_16nm;
        } else {
                priv->version = pd->genet_version;
                priv->dma_max_burst_length = DMA_MAX_BURST_LENGTH;

diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.h b/drivers/net/ethernet/broadcom/genet/bcmgenet.h
index 1cc2838e52c69d0ca3f389c2944f33b76882c608..946f6e283c4e6b24d4588ae6f42687ed58d84f41 100644 (file)
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.h
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.h
@@ -329,6 +329,7 @@ struct bcmgenet_mib_counters {
 #define  EXT_CFG_IDDQ_BIAS             (1 << 0)
 #define  EXT_CFG_PWR_DOWN              (1 << 1)
 #define  EXT_CK25_DIS                  (1 << 4)
+#define  EXT_CFG_IDDQ_GLOBAL_PWR       (1 << 3)
 #define  EXT_GPHY_RESET                        (1 << 5)
 
 /* DMA rings size */
@@ -612,6 +613,7 @@ struct bcmgenet_priv {
        phy_interface_t phy_interface;
        int phy_addr;
        int ext_phy;
+       bool ephy_16nm;
 
        /* Interrupt variables */
        struct work_struct bcmgenet_irq_work;

diff --git a/drivers/net/ethernet/broadcom/genet/bcmmii.c b/drivers/net/ethernet/broadcom/genet/bcmmii.c
index ad56f54eda0a3c01ed29450056d9a2236fdf710b..5f259641437a720c65dd4b3d70867a7bedbe5d0a 100644 (file)
--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c
@@ -139,14 +139,15 @@ void bcmgenet_phy_power_set(struct net_device *dev, bool enable)
        u32 reg = 0;
 
        /* EXT_GPHY_CTRL is only valid for GENETv4 and onward */
-       if (GENET_IS_V4(priv)) {
+       if (GENET_IS_V4(priv) || priv->ephy_16nm) {
                reg = bcmgenet_ext_readl(priv, EXT_GPHY_CTRL);
                if (enable) {
                        reg &= ~EXT_CK25_DIS;
                        bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);
                        mdelay(1);
 
-                       reg &= ~(EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN);
+                       reg &= ~(EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN |
+                                EXT_CFG_IDDQ_GLOBAL_PWR);
                        reg |= EXT_GPHY_RESET;
                        bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);
                        mdelay(1);
@@ -154,7 +155,7 @@ void bcmgenet_phy_power_set(struct net_device *dev, bool enable)
                        reg &= ~EXT_GPHY_RESET;
                } else {
                        reg |= EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN |
-                              EXT_GPHY_RESET;
+                              EXT_GPHY_RESET | EXT_CFG_IDDQ_GLOBAL_PWR;
                        bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);
                        mdelay(1);
                        reg |= EXT_CK25_DIS;