MIPS: OCTEON: program rx/tx-delay always from DT

Program rx/tx-delay always from DT.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org

diff --git a/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts b/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts
index 1c50cca4ea53f02b186cc8ed86f68deb09b6cb3e..dda0559cef50ef36a17287575785dba4077f6971 100644 (file)
--- a/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts
+++ b/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts
@@ -180,6 +180,8 @@
                                ethernet@0 {
                                        phy-handle = <&phy2>;
                                        cavium,alt-phy-handle = <&phy100>;
+                                       rx-delay = <0>;
+                                       tx-delay = <0>;
                                        fixed-link {
                                                speed = <1000>;
                                                full-duplex;
@@ -188,6 +190,8 @@
                                ethernet@1 {
                                        phy-handle = <&phy3>;
                                        cavium,alt-phy-handle = <&phy101>;
+                                       rx-delay = <0>;
+                                       tx-delay = <0>;
                                        fixed-link {
                                                speed = <1000>;
                                                full-duplex;
@@ -196,6 +200,8 @@
                                ethernet@2 {
                                        phy-handle = <&phy4>;
                                        cavium,alt-phy-handle = <&phy102>;
+                                       rx-delay = <0>;
+                                       tx-delay = <0>;
                                };
                                ethernet@3 {
                                        compatible = "cavium,octeon-3860-pip-port";

diff --git a/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts b/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts
index 243e5dc444fb13237166fad2fa5c37817a583b8f..962f37fbc7db8bef57fd3bc665907f0210154c71 100644 (file)
--- a/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts
+++ b/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts
@@ -33,12 +33,18 @@
                        interface@0 {
                                ethernet@0 {
                                        phy-handle = <&phy7>;
+                                       rx-delay = <0>;
+                                       tx-delay = <0x10>;
                                };
                                ethernet@1 {
                                        phy-handle = <&phy6>;
+                                       rx-delay = <0>;
+                                       tx-delay = <0x10>;
                                };
                                ethernet@2 {
                                        phy-handle = <&phy5>;
+                                       rx-delay = <0>;
+                                       tx-delay = <0x10>;
                                };
                        };
                };

diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
index 634eae578ffe6bd60182e9f2c0f29f67dab16cb0..2e2d45bc850d88715a0917939b2f23a5252118bb 100644 (file)
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
@@ -320,45 +320,6 @@ int __cvmx_helper_board_interface_probe(int interface, int supported_ports)
        return supported_ports;
 }
 
-/**
- * Enable packet input/output from the hardware. This function is
- * called after by cvmx_helper_packet_hardware_enable() to
- * perform board specific initialization. For most boards
- * nothing is needed.
- *
- * @interface: Interface to enable
- *
- * Returns Zero on success, negative on failure
- */
-int __cvmx_helper_board_hardware_enable(int interface)
-{
-       if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_CN3005_EVB_HS5) {
-               if (interface == 0) {
-                       /* Different config for switch port */
-                       cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0);
-                       cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0);
-                       /*
-                        * Boards with gigabit WAN ports need a
-                        * different setting that is compatible with
-                        * 100 Mbit settings
-                        */
-                       cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface),
-                                      0xc);
-                       cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface),
-                                      0xc);
-               }
-       } else if (cvmx_sysinfo_get()->board_type ==
-                       CVMX_BOARD_TYPE_UBNT_E100) {
-               cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 0);
-               cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 0x10);
-               cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0);
-               cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0x10);
-               cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(2, interface), 0);
-               cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(2, interface), 0x10);
-       }
-       return 0;
-}
-
 /**
  * Get the clock type used for the USB block based on board type.
  * Used by the USB code for auto configuration of clock type.

diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper.c b/arch/mips/cavium-octeon/executive/cvmx-helper.c
index 151fd440a4b4925a59ef309a7d1ded9e71eab4d7..de391541d6f7e922fdae619cd51663c34fed33be 100644 (file)
--- a/arch/mips/cavium-octeon/executive/cvmx-helper.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper.c
@@ -762,7 +762,6 @@ static int __cvmx_helper_packet_hardware_enable(int interface)
                result = __cvmx_helper_loop_enable(interface);
                break;
        }
-       result |= __cvmx_helper_board_hardware_enable(interface);
        return result;
 }
 

diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index b4073750822d7b90640e66122c0ec21a8bb7c092..51685f893eab02952af1a246b87a15213c144aff 100644 (file)
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -603,6 +603,45 @@ static void __init octeon_fdt_rm_ethernet(int node)
        fdt_nop_node(initial_boot_params, node);
 }
 
+static void __init _octeon_rx_tx_delay(int eth, int rx_delay, int tx_delay)
+{
+       fdt_setprop_inplace_cell(initial_boot_params, eth, "rx-delay",
+                                rx_delay);
+       fdt_setprop_inplace_cell(initial_boot_params, eth, "tx-delay",
+                                tx_delay);
+}
+
+static void __init octeon_rx_tx_delay(int eth, int iface, int port)
+{
+       switch (cvmx_sysinfo_get()->board_type) {
+       case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
+               if (iface == 0) {
+                       if (port == 0) {
+                               /*
+                                * Boards with gigabit WAN ports need a
+                                * different setting that is compatible with
+                                * 100 Mbit settings
+                                */
+                               _octeon_rx_tx_delay(eth, 0xc, 0x0c);
+                               return;
+                       } else if (port == 1) {
+                               /* Different config for switch port. */
+                               _octeon_rx_tx_delay(eth, 0x0, 0x0);
+                               return;
+                       }
+               }
+               break;
+       case CVMX_BOARD_TYPE_UBNT_E100:
+               if (iface == 0 && port <= 2) {
+                       _octeon_rx_tx_delay(eth, 0x0, 0x10);
+                       return;
+               }
+               break;
+       }
+       fdt_nop_property(initial_boot_params, eth, "rx-delay");
+       fdt_nop_property(initial_boot_params, eth, "tx-delay");
+}
+
 static void __init octeon_fdt_pip_port(int iface, int i, int p, int max)
 {
        char name_buffer[20];
@@ -633,6 +672,7 @@ static void __init octeon_fdt_pip_port(int iface, int i, int p, int max)
                WARN_ON(octeon_has_fixed_link(ipd_port));
        else if (!octeon_has_fixed_link(ipd_port))
                fdt_nop_node(initial_boot_params, fixed_link);
+       octeon_rx_tx_delay(eth, i, p);
 }
 
 static void __init octeon_fdt_pip_iface(int pip, int idx)

diff --git a/arch/mips/include/asm/octeon/cvmx-helper-board.h b/arch/mips/include/asm/octeon/cvmx-helper-board.h
index b4d19c21b62cfb53814917e78ffebb27d1343507..d7fdcf0a0088d8ed179fc970183667da2c5c4709 100644 (file)
--- a/arch/mips/include/asm/octeon/cvmx-helper-board.h
+++ b/arch/mips/include/asm/octeon/cvmx-helper-board.h
@@ -119,18 +119,6 @@ extern cvmx_helper_link_info_t __cvmx_helper_board_link_get(int ipd_port);
 extern int __cvmx_helper_board_interface_probe(int interface,
                                               int supported_ports);
 
-/**
- * Enable packet input/output from the hardware. This function is
- * called after by cvmx_helper_packet_hardware_enable() to
- * perform board specific initialization. For most boards
- * nothing is needed.
- *
- * @interface: Interface to enable
- *
- * Returns Zero on success, negative on failure
- */
-extern int __cvmx_helper_board_hardware_enable(int interface);
-
 enum cvmx_helper_board_usb_clock_types __cvmx_helper_board_usb_get_clock_type(void);
 
 #endif /* __CVMX_HELPER_BOARD_H__ */