[POWERPC] 85xx: sbc8548 - Fix incorrect PCI-X and PCI interrupt map

The following patch allows interrupts to occur on the
sbc8548. Currently PCI and PCI-X devices get assigned an IRQ
but the interrupt count never increases.  This solves the
problem and adds PCI support as well.

Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 14be38ad5d4b30f4ff3fcaa0a118680a68ba5df5..b86e65d926c16e40acffd304193018075deffa88 100644 (file)
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -184,11 +184,17 @@
                cell-index = <0>;
                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                interrupt-map = <
-                       /* IDSEL 0x01 (PCI-X slot) */
-                       0x0800 0x0 0x0 0x1 &mpic 0x0 0x1
-                       0x0800 0x0 0x0 0x2 &mpic 0x1 0x1
-                       0x0800 0x0 0x0 0x3 &mpic 0x2 0x1
-                       0x0800 0x0 0x0 0x4 &mpic 0x3 0x1>;
+                       /* IDSEL 0x01 (PCI-X slot) @66MHz */
+                       0x0800 0x0 0x0 0x1 &mpic 0x2 0x1
+                       0x0800 0x0 0x0 0x2 &mpic 0x3 0x1
+                       0x0800 0x0 0x0 0x3 &mpic 0x4 0x1
+                       0x0800 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                       /* IDSEL 0x11 (PCI, 3.3V 32bit) @33MHz */
+                       0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
+                       0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
+                       0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
+                       0x8800 0x0 0x0 0x4 &mpic 0x1 0x1>;
 
                interrupt-parent = <&mpic>;
                interrupts = <0x18 0x2>;