drm/xe/uapi: Crystal Reference Clock updates

First of all, let's remove the duplication.
But also, let's rename it to remove the word 'frequency'
out of it. In general, the first thing people think of frequency
is the frequency in which the GTs are operating to execute the
GPU instructions.

While this frequency here is a crystal reference clock frequency
which is the base of everything else, and in this case of this
uAPI it is used to calculate a better and precise timestamp.

v2: (Suggested by Jose) Remove the engine_cs and keep the GT info one
since it might be useful for other SRIOV cases where the engine_cs
will be zeroed. So, grabbing from the GT_LIST should be cleaner.

v3: Keep comment on put_user() call (José Roberto de Souza)

Cc: Matt Roper <matthew.d.roper@intel.com>
Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: Jose Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_gt_clock.c b/drivers/gpu/drm/xe/xe_gt_clock.c
index 25a18eaad9c4b12c5d1e609b681b71c15465e459..937054e31d72fe7900cd92e2c8c555a0bc8e5ac6 100644 (file)
--- a/drivers/gpu/drm/xe/xe_gt_clock.c
+++ b/drivers/gpu/drm/xe/xe_gt_clock.c
@@ -75,11 +75,11 @@ int xe_gt_clock_init(struct xe_gt *gt)
                freq >>= 3 - REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, c0);
        }
 
-       gt->info.clock_freq = freq;
+       gt->info.reference_clock = freq;
        return 0;
 }
 
 u64 xe_gt_clock_cycles_to_ns(const struct xe_gt *gt, u64 count)
 {
-       return DIV_ROUND_CLOSEST_ULL(count * NSEC_PER_SEC, gt->info.clock_freq);
+       return DIV_ROUND_CLOSEST_ULL(count * NSEC_PER_SEC, gt->info.reference_clock);
 }

diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index a96ee7d028aa06506f437764ec4ec998255d5af4..a7263738308ec6fcbd8e8a77ef09c4138a832d89 100644 (file)
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -107,8 +107,8 @@ struct xe_gt {
                enum xe_gt_type type;
                /** @id: Unique ID of this GT within the PCI Device */
                u8 id;
-               /** @clock_freq: clock frequency */
-               u32 clock_freq;
+               /** @reference_clock: clock frequency */
+               u32 reference_clock;
                /** @engine_mask: mask of engines present on GT */
                u64 engine_mask;
                /**

diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index ad9f23e4392044dce83deceaa934cee82db3657f..3316eab118b1d75f7d5922aa5980e077036e8d96 100644 (file)
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -147,8 +147,6 @@ query_engine_cycles(struct xe_device *xe,
        if (!hwe)
                return -EINVAL;
 
-       resp.engine_frequency = gt->info.clock_freq;
-
        xe_device_mem_access_get(xe);
        xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
 
@@ -165,9 +163,6 @@ query_engine_cycles(struct xe_device *xe,
        resp.width = 36;
 
        /* Only write to the output fields of user query */
-       if (put_user(resp.engine_frequency, &query_ptr->engine_frequency))
-               return -EFAULT;
-
        if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp))
                return -EFAULT;
 
@@ -383,7 +378,7 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
                else
                        gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
                gt_list->gt_list[id].gt_id = gt->info.id;
-               gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
+               gt_list->gt_list[id].reference_clock = gt->info.reference_clock;
                if (!IS_DGFX(xe))
                        gt_list->gt_list[id].near_mem_regions = 0x1;
                else

diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 77d54926e18f8f9244236004224f3a077d47128f..df3e6fcf9b8b7ea2730ebf39dbfba295fca37d58 100644 (file)
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -281,8 +281,8 @@ struct drm_xe_mem_region {
  * in .data. struct drm_xe_query_engine_cycles is allocated by the user and
  * .data points to this allocated structure.
  *
- * The query returns the engine cycles and the frequency that can
- * be used to calculate the engine timestamp. In addition the
+ * The query returns the engine cycles, which along with GT's @reference_clock,
+ * can be used to calculate the engine timestamp. In addition the
  * query returns a set of cpu timestamps that indicate when the command
  * streamer cycle count was captured.
  */
@@ -310,9 +310,6 @@ struct drm_xe_query_engine_cycles {
         */
        __u64 engine_cycles;
 
-       /** @engine_frequency: Frequency of the engine cycles in Hz. */
-       __u64 engine_frequency;
-
        /**
         * @cpu_timestamp: CPU timestamp in ns. The timestamp is captured before
         * reading the engine_cycles register using the reference clockid set by the
@@ -383,8 +380,8 @@ struct drm_xe_gt {
        __u16 type;
        /** @gt_id: Unique ID of this GT within the PCI Device */
        __u16 gt_id;
-       /** @clock_freq: A clock frequency for timestamp */
-       __u32 clock_freq;
+       /** @reference_clock: A clock frequency for timestamp */
+       __u32 reference_clock;
        /**
         * @near_mem_regions: Bit mask of instances from
         * drm_xe_query_mem_regions that are nearest to the current engines