]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
drm/rockchip: vop: Add output selection registers for RK312x
authorAlex Bee <knaerzche@gmail.com>
Fri, 22 Dec 2023 17:41:53 +0000 (18:41 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Fri, 29 Dec 2023 23:33:11 +0000 (00:33 +0100)
In contrast to RK3036, RK312x SoCs have multiple output channels such as
RGB (i.e. LVDS TTL), LVDS, DSI and HDMI.

In order to support that, this splits output from RK3036 and defines an
separate one for RK3126 with the registers required to enable the
appropriate output and setup the correct polarity.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231222174220.55249-3-knaerzche@gmail.com
drivers/gpu/drm/rockchip/rockchip_vop_reg.c
drivers/gpu/drm/rockchip/rockchip_vop_reg.h

index c51ca82320cb0c09d2fea4909ea560b706ec191b..b9ee02061d5bf377b167b03f3d9605ca6a1aa189 100644 (file)
@@ -227,11 +227,22 @@ static const struct vop_win_data rk3126_vop_win_data[] = {
          .type = DRM_PLANE_TYPE_CURSOR },
 };
 
+static const struct vop_output rk3126_output = {
+       .pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
+       .hdmi_pin_pol = VOP_REG(RK3126_INT_SCALER, 0x7, 4),
+       .hdmi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 22),
+       .hdmi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 23),
+       .rgb_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 24),
+       .rgb_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 25),
+       .mipi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 28),
+       .mipi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 29),
+};
+
 static const struct vop_data rk3126_vop = {
        .intr = &rk3036_intr,
        .common = &rk3036_common,
        .modeset = &rk3036_modeset,
-       .output = &rk3036_output,
+       .output = &rk3126_output,
        .win = rk3126_vop_win_data,
        .win_size = ARRAY_SIZE(rk3126_vop_win_data),
        .max_output = { 1920, 1080 },
index 406e981c75bd73df2f2350e1704030abd1b585f3..fbf1bcc686250ea3d0388e0922dcf6bc8a03d3ec 100644 (file)
 /* rk3036 register definition end */
 
 /* rk3126 register definition */
+#define RK3126_INT_SCALER              0x0c
+
+/* win1 register */
 #define RK3126_WIN1_MST                        0x4c
 #define RK3126_WIN1_DSP_INFO           0x50
 #define RK3126_WIN1_DSP_ST             0x54