nvmem: imx-ocotp: Add i.MX8MM support

This patch adds support to burn the fuses on the i.MX8MM.
https://www.nxp.com/webapp/Download?colCode=IMX8MMRM

The i.MX8MM is similar to i.MX6 processors in terms of addressing and clock
setup.

The documentation specifies 60 discreet OTP registers but, the fusemap
address space encompasses up to 256 registers. We map the entire putative
256 OTP registers.

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c
index b7dacf53c715dff7cfc857541fed440cc268f860..340ab336f987bea88529f85e01bea7c959084ede 100644 (file)
--- a/drivers/nvmem/imx-ocotp.c
+++ b/drivers/nvmem/imx-ocotp.c
@@ -473,6 +473,12 @@ static const struct ocotp_params imx8mq_params = {
        .set_timing = imx_ocotp_set_imx7_timing,
 };
 
+static const struct ocotp_params imx8mm_params = {
+       .nregs = 256,
+       .bank_address_words = 0,
+       .set_timing = imx_ocotp_set_imx6_timing,
+};
+
 static const struct of_device_id imx_ocotp_dt_ids[] = {
        { .compatible = "fsl,imx6q-ocotp",  .data = &imx6q_params },
        { .compatible = "fsl,imx6sl-ocotp", .data = &imx6sl_params },
@@ -483,6 +489,7 @@ static const struct of_device_id imx_ocotp_dt_ids[] = {
        { .compatible = "fsl,imx6sll-ocotp", .data = &imx6sll_params },
        { .compatible = "fsl,imx7ulp-ocotp", .data = &imx7ulp_params },
        { .compatible = "fsl,imx8mq-ocotp", .data = &imx8mq_params },
+       { .compatible = "fsl,imx8mm-ocotp", .data = &imx8mm_params },
        { },
 };
 MODULE_DEVICE_TABLE(of, imx_ocotp_dt_ids);