Merge tag 'sh-pfc-for-v5.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git...

pinctrl: sh-pfc: Updates for v5.1 (take two)

  - Add DRIF (digital radio) pin groups on R-Car E3 and M3-N,
  - Add TMU (timer) pin groups on R-Car M3-N,
  - Miscellaneous fixes,
  - Build-time validation for fixed-size field width mismatches.

diff --git a/drivers/pinctrl/sh-pfc/pfc-emev2.c b/drivers/pinctrl/sh-pfc/pfc-emev2.c
index dc271c3243df5ebfbbe36b3823ccc0b686727b1f..310c6f3ee7ccda30003987b96f44fd7c01491cb9 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-emev2.c
+++ b/drivers/pinctrl/sh-pfc/pfc-emev2.c
@@ -1260,6 +1260,14 @@ static const char * const dtv_groups[] = {
        "dtv_b",
 };
 
+static const char * const err_rst_reqb_groups[] = {
+       "err_rst_reqb",
+};
+
+static const char * const ext_clki_groups[] = {
+       "ext_clki",
+};
+
 static const char * const iic0_groups[] = {
        "iic0",
 };
@@ -1282,6 +1290,10 @@ static const char * const lcd_groups[] = {
        "yuv3",
 };
 
+static const char * const lowpwr_groups[] = {
+       "lowpwr",
+};
+
 static const char * const ntsc_groups[] = {
        "ntsc_clk",
        "ntsc_data",
@@ -1295,6 +1307,10 @@ static const char * const pwm1_groups[] = {
        "pwm1",
 };
 
+static const char * const ref_clko_groups[] = {
+       "ref_clko",
+};
+
 static const char * const sd_groups[] = {
        "sd_cki",
 };
@@ -1388,13 +1404,17 @@ static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(cam),
        SH_PFC_FUNCTION(cf),
        SH_PFC_FUNCTION(dtv),
+       SH_PFC_FUNCTION(err_rst_reqb),
+       SH_PFC_FUNCTION(ext_clki),
        SH_PFC_FUNCTION(iic0),
        SH_PFC_FUNCTION(iic1),
        SH_PFC_FUNCTION(jtag),
        SH_PFC_FUNCTION(lcd),
+       SH_PFC_FUNCTION(lowpwr),
        SH_PFC_FUNCTION(ntsc),
        SH_PFC_FUNCTION(pwm0),
        SH_PFC_FUNCTION(pwm1),
+       SH_PFC_FUNCTION(ref_clko),
        SH_PFC_FUNCTION(sd),
        SH_PFC_FUNCTION(sdi0),
        SH_PFC_FUNCTION(sdi1),

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index bd363f2e196fcc26f42f2e569ef2fa395a037332..d8b13d4e9bbff7cb935dba68d727c4917d650e61 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -5236,7 +5236,7 @@ static const char * const scifb2_groups[] = {
        "scifb2_data_b",
        "scifb2_clk_b",
        "scifb2_ctrl_b",
-       "scifb0_data_c",
+       "scifb2_data_c",
        "scifb2_clk_c",
        "scifb2_data_d",
 };

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7792.c b/drivers/pinctrl/sh-pfc/pfc-r8a7792.c
index a623459b234e048e24dc4a9cac590347cf6f2970..d36da5652de6c6d371b7f41907c90de9d26f3566 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7792.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7792.c
@@ -1913,6 +1913,7 @@ static const char * const vin1_groups[] = {
        "vin1_data8",
        "vin1_data24_b",
        "vin1_data20_b",
+       "vin1_data18_b",
        "vin1_data16_b",
        "vin1_sync",
        "vin1_field",

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
index d937b1bc396accee55ff3421902fb935d9c77c44..14c4b671cddf46a1f929a709c9795f6af5d0a439 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
@@ -1850,6 +1850,280 @@ static const unsigned int canfd1_data_mux[] = {
        CANFD1_TX_MARK,         CANFD1_RX_MARK,
 };
 
+/* - DRIF0 --------------------------------------------------------------- */
+static const unsigned int drif0_ctrl_a_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
+};
+
+static const unsigned int drif0_ctrl_a_mux[] = {
+       RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
+};
+
+static const unsigned int drif0_data0_a_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(6, 10),
+};
+
+static const unsigned int drif0_data0_a_mux[] = {
+       RIF0_D0_A_MARK,
+};
+
+static const unsigned int drif0_data1_a_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(6, 7),
+};
+
+static const unsigned int drif0_data1_a_mux[] = {
+       RIF0_D1_A_MARK,
+};
+
+static const unsigned int drif0_ctrl_b_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
+};
+
+static const unsigned int drif0_ctrl_b_mux[] = {
+       RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
+};
+
+static const unsigned int drif0_data0_b_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(5, 1),
+};
+
+static const unsigned int drif0_data0_b_mux[] = {
+       RIF0_D0_B_MARK,
+};
+
+static const unsigned int drif0_data1_b_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(5, 2),
+};
+
+static const unsigned int drif0_data1_b_mux[] = {
+       RIF0_D1_B_MARK,
+};
+
+static const unsigned int drif0_ctrl_c_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15),
+};
+
+static const unsigned int drif0_ctrl_c_mux[] = {
+       RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK,
+};
+
+static const unsigned int drif0_data0_c_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(5, 13),
+};
+
+static const unsigned int drif0_data0_c_mux[] = {
+       RIF0_D0_C_MARK,
+};
+
+static const unsigned int drif0_data1_c_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(5, 14),
+};
+
+static const unsigned int drif0_data1_c_mux[] = {
+       RIF0_D1_C_MARK,
+};
+
+/* - DRIF1 --------------------------------------------------------------- */
+static const unsigned int drif1_ctrl_a_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
+};
+
+static const unsigned int drif1_ctrl_a_mux[] = {
+       RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK,
+};
+
+static const unsigned int drif1_data0_a_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(6, 19),
+};
+
+static const unsigned int drif1_data0_a_mux[] = {
+       RIF1_D0_A_MARK,
+};
+
+static const unsigned int drif1_data1_a_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(6, 20),
+};
+
+static const unsigned int drif1_data1_a_mux[] = {
+       RIF1_D1_A_MARK,
+};
+
+static const unsigned int drif1_ctrl_b_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3),
+};
+
+static const unsigned int drif1_ctrl_b_mux[] = {
+       RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK,
+};
+
+static const unsigned int drif1_data0_b_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(5, 7),
+};
+
+static const unsigned int drif1_data0_b_mux[] = {
+       RIF1_D0_B_MARK,
+};
+
+static const unsigned int drif1_data1_b_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(5, 8),
+};
+
+static const unsigned int drif1_data1_b_mux[] = {
+       RIF1_D1_B_MARK,
+};
+
+static const unsigned int drif1_ctrl_c_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
+};
+
+static const unsigned int drif1_ctrl_c_mux[] = {
+       RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK,
+};
+
+static const unsigned int drif1_data0_c_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(5, 6),
+};
+
+static const unsigned int drif1_data0_c_mux[] = {
+       RIF1_D0_C_MARK,
+};
+
+static const unsigned int drif1_data1_c_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(5, 10),
+};
+
+static const unsigned int drif1_data1_c_mux[] = {
+       RIF1_D1_C_MARK,
+};
+
+/* - DRIF2 --------------------------------------------------------------- */
+static const unsigned int drif2_ctrl_a_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
+};
+
+static const unsigned int drif2_ctrl_a_mux[] = {
+       RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
+};
+
+static const unsigned int drif2_data0_a_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(6, 7),
+};
+
+static const unsigned int drif2_data0_a_mux[] = {
+       RIF2_D0_A_MARK,
+};
+
+static const unsigned int drif2_data1_a_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(6, 10),
+};
+
+static const unsigned int drif2_data1_a_mux[] = {
+       RIF2_D1_A_MARK,
+};
+
+static const unsigned int drif2_ctrl_b_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
+};
+
+static const unsigned int drif2_ctrl_b_mux[] = {
+       RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
+};
+
+static const unsigned int drif2_data0_b_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(6, 30),
+};
+
+static const unsigned int drif2_data0_b_mux[] = {
+       RIF2_D0_B_MARK,
+};
+
+static const unsigned int drif2_data1_b_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(6, 31),
+};
+
+static const unsigned int drif2_data1_b_mux[] = {
+       RIF2_D1_B_MARK,
+};
+
+/* - DRIF3 --------------------------------------------------------------- */
+static const unsigned int drif3_ctrl_a_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
+};
+
+static const unsigned int drif3_ctrl_a_mux[] = {
+       RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
+};
+
+static const unsigned int drif3_data0_a_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(6, 19),
+};
+
+static const unsigned int drif3_data0_a_mux[] = {
+       RIF3_D0_A_MARK,
+};
+
+static const unsigned int drif3_data1_a_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(6, 20),
+};
+
+static const unsigned int drif3_data1_a_mux[] = {
+       RIF3_D1_A_MARK,
+};
+
+static const unsigned int drif3_ctrl_b_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
+};
+
+static const unsigned int drif3_ctrl_b_mux[] = {
+       RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
+};
+
+static const unsigned int drif3_data0_b_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(6, 28),
+};
+
+static const unsigned int drif3_data0_b_mux[] = {
+       RIF3_D0_B_MARK,
+};
+
+static const unsigned int drif3_data1_b_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(6, 29),
+};
+
+static const unsigned int drif3_data1_b_mux[] = {
+       RIF3_D1_B_MARK,
+};
+
 /* - DU --------------------------------------------------------------------- */
 static const unsigned int du_rgb666_pins[] = {
        /* R[7:2], G[7:2], B[7:2] */
@@ -3760,6 +4034,42 @@ static const unsigned int ssi9_ctrl_b_mux[] = {
        SSI_SCK9_B_MARK, SSI_WS9_B_MARK,
 };
 
+/* - TMU -------------------------------------------------------------------- */
+static const unsigned int tmu_tclk1_a_pins[] = {
+       /* TCLK */
+       RCAR_GP_PIN(6, 23),
+};
+
+static const unsigned int tmu_tclk1_a_mux[] = {
+       TCLK1_A_MARK,
+};
+
+static const unsigned int tmu_tclk1_b_pins[] = {
+       /* TCLK */
+       RCAR_GP_PIN(5, 19),
+};
+
+static const unsigned int tmu_tclk1_b_mux[] = {
+       TCLK1_B_MARK,
+};
+
+static const unsigned int tmu_tclk2_a_pins[] = {
+       /* TCLK */
+       RCAR_GP_PIN(6, 19),
+};
+
+static const unsigned int tmu_tclk2_a_mux[] = {
+       TCLK2_A_MARK,
+};
+
+static const unsigned int tmu_tclk2_b_pins[] = {
+       /* TCLK */
+       RCAR_GP_PIN(6, 28),
+};
+
+static const unsigned int tmu_tclk2_b_mux[] = {
+       TCLK2_B_MARK,
+};
 
 /* - USB0 ------------------------------------------------------------------- */
 static const unsigned int usb0_pins[] = {
@@ -4037,6 +4347,36 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(canfd0_data_a),
        SH_PFC_PIN_GROUP(canfd0_data_b),
        SH_PFC_PIN_GROUP(canfd1_data),
+       SH_PFC_PIN_GROUP(drif0_ctrl_a),
+       SH_PFC_PIN_GROUP(drif0_data0_a),
+       SH_PFC_PIN_GROUP(drif0_data1_a),
+       SH_PFC_PIN_GROUP(drif0_ctrl_b),
+       SH_PFC_PIN_GROUP(drif0_data0_b),
+       SH_PFC_PIN_GROUP(drif0_data1_b),
+       SH_PFC_PIN_GROUP(drif0_ctrl_c),
+       SH_PFC_PIN_GROUP(drif0_data0_c),
+       SH_PFC_PIN_GROUP(drif0_data1_c),
+       SH_PFC_PIN_GROUP(drif1_ctrl_a),
+       SH_PFC_PIN_GROUP(drif1_data0_a),
+       SH_PFC_PIN_GROUP(drif1_data1_a),
+       SH_PFC_PIN_GROUP(drif1_ctrl_b),
+       SH_PFC_PIN_GROUP(drif1_data0_b),
+       SH_PFC_PIN_GROUP(drif1_data1_b),
+       SH_PFC_PIN_GROUP(drif1_ctrl_c),
+       SH_PFC_PIN_GROUP(drif1_data0_c),
+       SH_PFC_PIN_GROUP(drif1_data1_c),
+       SH_PFC_PIN_GROUP(drif2_ctrl_a),
+       SH_PFC_PIN_GROUP(drif2_data0_a),
+       SH_PFC_PIN_GROUP(drif2_data1_a),
+       SH_PFC_PIN_GROUP(drif2_ctrl_b),
+       SH_PFC_PIN_GROUP(drif2_data0_b),
+       SH_PFC_PIN_GROUP(drif2_data1_b),
+       SH_PFC_PIN_GROUP(drif3_ctrl_a),
+       SH_PFC_PIN_GROUP(drif3_data0_a),
+       SH_PFC_PIN_GROUP(drif3_data1_a),
+       SH_PFC_PIN_GROUP(drif3_ctrl_b),
+       SH_PFC_PIN_GROUP(drif3_data0_b),
+       SH_PFC_PIN_GROUP(drif3_data1_b),
        SH_PFC_PIN_GROUP(du_rgb666),
        SH_PFC_PIN_GROUP(du_rgb888),
        SH_PFC_PIN_GROUP(du_clk_out_0),
@@ -4280,6 +4620,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(ssi9_data_b),
        SH_PFC_PIN_GROUP(ssi9_ctrl_a),
        SH_PFC_PIN_GROUP(ssi9_ctrl_b),
+       SH_PFC_PIN_GROUP(tmu_tclk1_a),
+       SH_PFC_PIN_GROUP(tmu_tclk1_b),
+       SH_PFC_PIN_GROUP(tmu_tclk2_a),
+       SH_PFC_PIN_GROUP(tmu_tclk2_b),
        SH_PFC_PIN_GROUP(usb0),
        SH_PFC_PIN_GROUP(usb1),
        SH_PFC_PIN_GROUP(usb30),
@@ -4367,6 +4711,48 @@ static const char * const canfd1_groups[] = {
        "canfd1_data",
 };
 
+static const char * const drif0_groups[] = {
+       "drif0_ctrl_a",
+       "drif0_data0_a",
+       "drif0_data1_a",
+       "drif0_ctrl_b",
+       "drif0_data0_b",
+       "drif0_data1_b",
+       "drif0_ctrl_c",
+       "drif0_data0_c",
+       "drif0_data1_c",
+};
+
+static const char * const drif1_groups[] = {
+       "drif1_ctrl_a",
+       "drif1_data0_a",
+       "drif1_data1_a",
+       "drif1_ctrl_b",
+       "drif1_data0_b",
+       "drif1_data1_b",
+       "drif1_ctrl_c",
+       "drif1_data0_c",
+       "drif1_data1_c",
+};
+
+static const char * const drif2_groups[] = {
+       "drif2_ctrl_a",
+       "drif2_data0_a",
+       "drif2_data1_a",
+       "drif2_ctrl_b",
+       "drif2_data0_b",
+       "drif2_data1_b",
+};
+
+static const char * const drif3_groups[] = {
+       "drif3_ctrl_a",
+       "drif3_data0_a",
+       "drif3_data1_a",
+       "drif3_ctrl_b",
+       "drif3_data0_b",
+       "drif3_data1_b",
+};
+
 static const char * const du_groups[] = {
        "du_rgb666",
        "du_rgb888",
@@ -4711,6 +5097,13 @@ static const char * const ssi_groups[] = {
        "ssi9_ctrl_b",
 };
 
+static const char * const tmu_groups[] = {
+       "tmu_tclk1_a",
+       "tmu_tclk1_b",
+       "tmu_tclk2_a",
+       "tmu_tclk2_b",
+};
+
 static const char * const usb0_groups[] = {
        "usb0",
 };
@@ -4763,6 +5156,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(can_clk),
        SH_PFC_FUNCTION(canfd0),
        SH_PFC_FUNCTION(canfd1),
+       SH_PFC_FUNCTION(drif0),
+       SH_PFC_FUNCTION(drif1),
+       SH_PFC_FUNCTION(drif2),
+       SH_PFC_FUNCTION(drif3),
        SH_PFC_FUNCTION(du),
        SH_PFC_FUNCTION(hscif0),
        SH_PFC_FUNCTION(hscif1),
@@ -4797,6 +5194,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(sdhi2),
        SH_PFC_FUNCTION(sdhi3),
        SH_PFC_FUNCTION(ssi),
+       SH_PFC_FUNCTION(tmu),
        SH_PFC_FUNCTION(usb0),
        SH_PFC_FUNCTION(usb1),
        SH_PFC_FUNCTION(usb30),

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
index 0a9aa62f50bb2ea375d36c67cb1a33c9e637473c..151640c30e9dc791965a38e076cbca6f27d4e7f3 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
@@ -1599,6 +1599,199 @@ static const unsigned int canfd1_data_mux[] = {
        CANFD1_TX_MARK, CANFD1_RX_MARK,
 };
 
+/* - DRIF0 --------------------------------------------------------------- */
+static const unsigned int drif0_ctrl_a_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 19),
+};
+
+static const unsigned int drif0_ctrl_a_mux[] = {
+       RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
+};
+
+static const unsigned int drif0_data0_a_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(5, 17),
+};
+
+static const unsigned int drif0_data0_a_mux[] = {
+       RIF0_D0_A_MARK,
+};
+
+static const unsigned int drif0_data1_a_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(5, 18),
+};
+
+static const unsigned int drif0_data1_a_mux[] = {
+       RIF0_D1_A_MARK,
+};
+
+static const unsigned int drif0_ctrl_b_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 15),
+};
+
+static const unsigned int drif0_ctrl_b_mux[] = {
+       RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
+};
+
+static const unsigned int drif0_data0_b_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(3, 13),
+};
+
+static const unsigned int drif0_data0_b_mux[] = {
+       RIF0_D0_B_MARK,
+};
+
+static const unsigned int drif0_data1_b_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(3, 14),
+};
+
+static const unsigned int drif0_data1_b_mux[] = {
+       RIF0_D1_B_MARK,
+};
+
+/* - DRIF1 --------------------------------------------------------------- */
+static const unsigned int drif1_ctrl_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 1),
+};
+
+static const unsigned int drif1_ctrl_mux[] = {
+       RIF1_CLK_MARK, RIF1_SYNC_MARK,
+};
+
+static const unsigned int drif1_data0_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(5, 2),
+};
+
+static const unsigned int drif1_data0_mux[] = {
+       RIF1_D0_MARK,
+};
+
+static const unsigned int drif1_data1_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(5, 3),
+};
+
+static const unsigned int drif1_data1_mux[] = {
+       RIF1_D1_MARK,
+};
+
+/* - DRIF2 --------------------------------------------------------------- */
+static const unsigned int drif2_ctrl_a_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
+};
+
+static const unsigned int drif2_ctrl_a_mux[] = {
+       RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
+};
+
+static const unsigned int drif2_data0_a_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(2, 8),
+};
+
+static const unsigned int drif2_data0_a_mux[] = {
+       RIF2_D0_A_MARK,
+};
+
+static const unsigned int drif2_data1_a_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(2, 9),
+};
+
+static const unsigned int drif2_data1_a_mux[] = {
+       RIF2_D1_A_MARK,
+};
+
+static const unsigned int drif2_ctrl_b_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+};
+
+static const unsigned int drif2_ctrl_b_mux[] = {
+       RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
+};
+
+static const unsigned int drif2_data0_b_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(1, 6),
+};
+
+static const unsigned int drif2_data0_b_mux[] = {
+       RIF2_D0_B_MARK,
+};
+
+static const unsigned int drif2_data1_b_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(1, 7),
+};
+
+static const unsigned int drif2_data1_b_mux[] = {
+       RIF2_D1_B_MARK,
+};
+
+/* - DRIF3 --------------------------------------------------------------- */
+static const unsigned int drif3_ctrl_a_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11),
+};
+
+static const unsigned int drif3_ctrl_a_mux[] = {
+       RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
+};
+
+static const unsigned int drif3_data0_a_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(2, 12),
+};
+
+static const unsigned int drif3_data0_a_mux[] = {
+       RIF3_D0_A_MARK,
+};
+
+static const unsigned int drif3_data1_a_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(2, 13),
+};
+
+static const unsigned int drif3_data1_a_mux[] = {
+       RIF3_D1_A_MARK,
+};
+
+static const unsigned int drif3_ctrl_b_pins[] = {
+       /* CLK, SYNC */
+       RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
+};
+
+static const unsigned int drif3_ctrl_b_mux[] = {
+       RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
+};
+
+static const unsigned int drif3_data0_b_pins[] = {
+       /* D0 */
+       RCAR_GP_PIN(0, 10),
+};
+
+static const unsigned int drif3_data0_b_mux[] = {
+       RIF3_D0_B_MARK,
+};
+
+static const unsigned int drif3_data1_b_pins[] = {
+       /* D1 */
+       RCAR_GP_PIN(0, 11),
+};
+
+static const unsigned int drif3_data1_b_mux[] = {
+       RIF3_D1_B_MARK,
+};
+
 /* - DU --------------------------------------------------------------------- */
 static const unsigned int du_rgb666_pins[] = {
        /* R[7:2], G[7:2], B[7:2] */
@@ -3574,7 +3767,7 @@ static const unsigned int vin5_clk_b_mux[] = {
 
 static const struct {
        struct sh_pfc_pin_group common[245];
-       struct sh_pfc_pin_group automotive[2];
+       struct sh_pfc_pin_group automotive[23];
 } pinmux_groups = {
        .common = {
                SH_PFC_PIN_GROUP(audio_clk_a),
@@ -3826,6 +4019,27 @@ static const struct {
        .automotive = {
                SH_PFC_PIN_GROUP(canfd0_data),
                SH_PFC_PIN_GROUP(canfd1_data),
+               SH_PFC_PIN_GROUP(drif0_ctrl_a),
+               SH_PFC_PIN_GROUP(drif0_data0_a),
+               SH_PFC_PIN_GROUP(drif0_data1_a),
+               SH_PFC_PIN_GROUP(drif0_ctrl_b),
+               SH_PFC_PIN_GROUP(drif0_data0_b),
+               SH_PFC_PIN_GROUP(drif0_data1_b),
+               SH_PFC_PIN_GROUP(drif1_ctrl),
+               SH_PFC_PIN_GROUP(drif1_data0),
+               SH_PFC_PIN_GROUP(drif1_data1),
+               SH_PFC_PIN_GROUP(drif2_ctrl_a),
+               SH_PFC_PIN_GROUP(drif2_data0_a),
+               SH_PFC_PIN_GROUP(drif2_data1_a),
+               SH_PFC_PIN_GROUP(drif2_ctrl_b),
+               SH_PFC_PIN_GROUP(drif2_data0_b),
+               SH_PFC_PIN_GROUP(drif2_data1_b),
+               SH_PFC_PIN_GROUP(drif3_ctrl_a),
+               SH_PFC_PIN_GROUP(drif3_data0_a),
+               SH_PFC_PIN_GROUP(drif3_data1_a),
+               SH_PFC_PIN_GROUP(drif3_ctrl_b),
+               SH_PFC_PIN_GROUP(drif3_data0_b),
+               SH_PFC_PIN_GROUP(drif3_data1_b),
        }
 };
 
@@ -3880,6 +4094,39 @@ static const char * const canfd1_groups[] = {
        "canfd1_data",
 };
 
+static const char * const drif0_groups[] = {
+       "drif0_ctrl_a",
+       "drif0_data0_a",
+       "drif0_data1_a",
+       "drif0_ctrl_b",
+       "drif0_data0_b",
+       "drif0_data1_b",
+};
+
+static const char * const drif1_groups[] = {
+       "drif1_ctrl",
+       "drif1_data0",
+       "drif1_data1",
+};
+
+static const char * const drif2_groups[] = {
+       "drif2_ctrl_a",
+       "drif2_data0_a",
+       "drif2_data1_a",
+       "drif2_ctrl_b",
+       "drif2_data0_b",
+       "drif2_data1_b",
+};
+
+static const char * const drif3_groups[] = {
+       "drif3_ctrl_a",
+       "drif3_data0_a",
+       "drif3_data1_a",
+       "drif3_ctrl_b",
+       "drif3_data0_b",
+       "drif3_data1_b",
+};
+
 static const char * const du_groups[] = {
        "du_rgb666",
        "du_rgb888",
@@ -4219,7 +4466,7 @@ static const char * const vin5_groups[] = {
 
 static const struct {
        struct sh_pfc_function common[45];
-       struct sh_pfc_function automotive[2];
+       struct sh_pfc_function automotive[6];
 } pinmux_functions = {
        .common = {
                SH_PFC_FUNCTION(audio_clk),
@@ -4271,6 +4518,10 @@ static const struct {
        .automotive = {
                SH_PFC_FUNCTION(canfd0),
                SH_PFC_FUNCTION(canfd1),
+               SH_PFC_FUNCTION(drif0),
+               SH_PFC_FUNCTION(drif1),
+               SH_PFC_FUNCTION(drif2),
+               SH_PFC_FUNCTION(drif3),
        }
 };
 

diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index 085770e66895680a5bd32728b6e98352f597ea4f..ef3da8bf1d8700fa4e8819708be899a8514acf21 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -3354,7 +3354,8 @@ static const char * const fsic_groups[] = {
        "fsic_sclk_out",
        "fsic_data_in",
        "fsic_data_out",
-       "fsic_spdif",
+       "fsic_spdif_0",
+       "fsic_spdif_1",
 };
 
 static const char * const fsid_groups[] = {

diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index 46d477ff510921f36036b92bf8778296fbf3b081..56016cb76769c97bd1298b38eaeb329dde09da17 100644 (file)
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -126,7 +126,8 @@ struct pinmux_cfg_reg {
  * one for each possible combination of the register field bit values.
  */
 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
-       .reg = r, .reg_width = r_width, .field_width = f_width,         \
+       .reg = r, .reg_width = r_width,                                 \
+       .field_width = f_width + BUILD_BUG_ON_ZERO(r_width % f_width),  \
        .enum_ids = (const u16 [(r_width / f_width) * (1 << f_width)])
 
 /*