MIPS: BCM63XX: Hook up plat_ioremap to intercept soc registers remapping.

Internal SOC registers can be directly accessed, no need to waste a
TLB entry.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2890/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/mach-bcm63xx/ioremap.h b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
new file mode 100644 (file)
index 0000000..e3fe04d
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
@@ -0,0 +1,38 @@
+#ifndef BCM63XX_IOREMAP_H_
+#define BCM63XX_IOREMAP_H_
+
+#include <bcm63xx_cpu.h>
+
+static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+{
+       return phys_addr;
+}
+
+static inline int is_bcm63xx_internal_registers(phys_t offset)
+{
+       switch (bcm63xx_get_cpu_id()) {
+       case BCM6338_CPU_ID:
+       case BCM6345_CPU_ID:
+       case BCM6348_CPU_ID:
+       case BCM6358_CPU_ID:
+               if (offset >= 0xfff00000)
+                       return 1;
+               break;
+       }
+       return 0;
+}
+
+static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
+                                        unsigned long flags)
+{
+       if (is_bcm63xx_internal_registers(offset))
+               return (void __iomem *)offset;
+       return NULL;
+}
+
+static inline int plat_iounmap(const volatile void __iomem *addr)
+{
+       return is_bcm63xx_internal_registers((unsigned long)addr);
+}
+
+#endif /* BCM63XX_IOREMAP_H_ */