pr_info("%s S\n", __func__);
mutex_lock(&dev->input_lock);
- /* set inital registers */
+ /* set initial registers */
ret = gc0310_write_reg_array(client, gc0310_reset_register);
/* restore settings */
/////////////////////////////////////////////////
{GC0310_8BIT, 0xfe, 0x01},
{GC0310_8BIT, 0x45, 0xa4}, // 0xf7
- {GC0310_8BIT, 0x46, 0xf0}, // 0xff //f0//sun vaule th
+ {GC0310_8BIT, 0x46, 0xf0}, // 0xff //f0//sun value th
{GC0310_8BIT, 0x48, 0x03}, //sun mode
{GC0310_8BIT, 0x4f, 0x60}, //sun_clamp
{GC0310_8BIT, 0xfe, 0x00},
unsigned int agc;
unsigned int awb;
unsigned int aec;
- /* extention SENSOR version 2 */
+ /* extension SENSOR version 2 */
unsigned int cie_profile;
- /* extention SENSOR version 3 */
+ /* extension SENSOR version 3 */
unsigned int flicker_freq;
/* extension SENSOR version 4 */
#endif
if (arg->per_frame_setting && !atomisp_is_vf_pipe(pipe)) {
/*
- * Per-frame setting enabled, we allocate a new paramter
+ * Per-frame setting enabled, we allocate a new parameter
* buffer to cache the parameters and only when frame buffers
* are ready, the parameters will be set to CSS.
* per-frame setting only works for the main output frame.
*
* Rule for Bayer Downscaling: support factor 2, 1.5 and 1.25
* Rule for YUV Decimation: support factor 2, 4
- * Rule for YUV Downscaling: arbitary value below 2
+ * Rule for YUV Downscaling: arbitrary value below 2
*
* General rule of factor distribution among these stages:
* 1: try to do Bayer downscaling first if not in online mode.
* @fh : V4L2 subdev file handle
* @pad: pad num
* @fmt: pointer to v4l2 format structure
- * return -EINVAL or zero on sucess
+ * return -EINVAL or zero on success
*/
static int csi2_get_format(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
* Because the camera halv3 can't ensure to set zoom
* region to per_frame setting and global setting at
* same time and only set zoom region to pre_frame
- * setting now.so when the pre_frame setting inculde
+ * setting now.so when the pre_frame setting include
* zoom region,I will set it to global setting.
*/
if (param->params.update_flag.dz_config &&
*/
struct atomisp_sub_device *asd;
/*
- * this will be assiged dyanamically.
+ * this will be assigned dyanamically.
* For Merr/BTY(ISP2400), 2 streams are supported.
*/
unsigned int num_of_streams;
struct v4l2_control ctrl;
int i, ret = 0;
- /* input_lock is not need for the Camera releated IOCTLs
+ /* input_lock is not need for the Camera related IOCTLs
* The input_lock downgrade the FPS of 3A*/
ret = atomisp_camera_g_ext_ctrls(file, fh, c);
if (ret != -EINVAL)
struct v4l2_control ctrl;
int i, ret = 0;
- /* input_lock is not need for the Camera releated IOCTLs
+ /* input_lock is not need for the Camera related IOCTLs
* The input_lock downgrade the FPS of 3A*/
ret = atomisp_camera_s_ext_ctrls(file, fh, c);
if (ret != -EINVAL)
/*
* Control to disable digital zoom of the whole stream
*
- * When it is true, pipe configuation enable_dz will be set to false.
+ * When it is true, pipe configuration enable_dz will be set to false.
* This can help get a better performance by disabling pp binary.
*
* Note: Make sure set this configuration before creating stream.
* but new elements should be added at the end to existing
* cb element array which if of max_size >= new size
*
- * @return true on succesfully increasing the size
+ * @return true on successfully increasing the size
* false on failure
*/
extern bool ia_css_circbuf_increase_size(
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */
-/* used reseved mipi positions for these */
+/* used reserved mipi positions for these */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37
/* */
#define _PXG_SYNG_PAUSE_CYCLES 0
/* Subblock ID's */
-#define _PXG_DISBALE_IDX 0
+#define _PXG_DISABLE_IDX 0
#define _PXG_PRBS_IDX 0
#define _PXG_TPG_IDX 1
#define _PXG_SYNG_IDX 2
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */
-/* used reseved mipi positions for these */
+/* used reserved mipi positions for these */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */
-/* used reseved mipi positions for these */
+/* used reserved mipi positions for these */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37
* The DMA port definition for the input system
* 2401 DMA is the duplication of the DMA port
* definition for the CSS system DMA. It is duplicated
- * here just as the temporal step before the device libary
- * is available. The device libary is suppose to provide
+ * here just as the temporal step before the device library
+ * is available. The device library is suppose to provide
* the capability of reusing the control interface of the
* same device prototypes. The refactor team will work on
* this, right?
* The DMA device definition for the input system
* 2401 DMA is the duplicattion of the DMA device
* definition for the CSS system DMA. It is duplicated
- * here just as the temporal step before the device libary
- * is available. The device libary is suppose to provide
+ * here just as the temporal step before the device library
+ * is available. The device library is suppose to provide
* the capability of reusing the control interface of the
* same device prototypes. The refactor team will work on
* this, right?
N_IA_CSS_MEMORIES
};
#define IA_CSS_NUM_MEMORIES 9
-/* For driver compatability */
+/* For driver compatibility */
#define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES
#define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */
-/* used reseved mipi positions for these */
+/* used reserved mipi positions for these */
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47
#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37
N_IA_CSS_MEMORIES
};
#define IA_CSS_NUM_MEMORIES 9
-/* For driver compatability */
+/* For driver compatibility */
#define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES
#define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES
#ifndef PIPE_GENERATION
/* Deprecated OP___assert, this is still used in ~1000 places
* in the code. This will be removed over time.
- * The implemenation for the pipe generation tool is in see support.isp.h */
+ * The implementation for the pipe generation tool is in see support.isp.h */
#define OP___assert(cnd) assert(cnd)
static inline void compile_time_assert (unsigned cond)
* Load the value of the register of the csi rx fe.
*
* @param[in] ID The global unique ID for the ibuf-controller instance.
- * @param[in] reg The offet address of the register.
+ * @param[in] reg The offset address of the register.
*
* @return the value of the register.
*/
* Store a value to the registe of the csi rx fe.
*
* @param[in] ID The global unique ID for the ibuf-controller instance.
- * @param[in] reg The offet address of the register.
+ * @param[in] reg The offset address of the register.
* @param[in] value The value to be stored.
*
*/
* Load the value of the register of the csirx be.
*
* @param[in] ID The global unique ID for the ibuf-controller instance.
- * @param[in] reg The offet address of the register.
+ * @param[in] reg The offset address of the register.
*
* @return the value of the register.
*/
* Store a value to the registe of the csi rx be.
*
* @param[in] ID The global unique ID for the ibuf-controller instance.
- * @param[in] reg The offet address of the register.
+ * @param[in] reg The offset address of the register.
* @param[in] value The value to be stored.
*
*/
* Load the value of the register of the ibuf-controller.
*
* @param[in] ID The global unique ID for the ibuf-controller instance.
- * @param[in] reg The offet address of the register.
+ * @param[in] reg The offset address of the register.
*
* @return the value of the register.
*/
* Store a value to the registe of the ibuf-controller.
*
* @param[in] ID The global unique ID for the ibuf-controller instance.
- * @param[in] reg The offet address of the register.
+ * @param[in] reg The offset address of the register.
* @param[in] value The value to be stored.
*
*/
*
* @param[in] ID The global unique ID for the stream2mmio-controller instance.
* @param[in] sid_id The SID in question.
- * @param[in] reg_idx The offet address of the register.
+ * @param[in] reg_idx The offset address of the register.
*
* @return the value of the register.
*/
* Store a value to the registe of the stream2mmio-controller.
*
* @param[in] ID The global unique ID for the stream2mmio-controller instance.
- * @param[in] reg The offet address of the register.
+ * @param[in] reg The offset address of the register.
* @param[in] value The value to be stored.
*
*/
* Load the value of the register of the pixelgen
*
* @param[in] ID The global unique ID for the pixelgen instance.
- * @param[in] reg The offet address of the register.
+ * @param[in] reg The offset address of the register.
*
* @return the value of the register.
*/
* Store a value to the registe of the pixelgen
*
* @param[in] ID The global unique ID for the pixelgen.
- * @param[in] reg The offet address of the register.
+ * @param[in] reg The offset address of the register.
* @param[in] value The value to be stored.
*
*/
\param attribute[in] Bit vector specifying the properties
of the allocation
\param context Pointer of a context provided by
- client/driver for additonal parameters
+ client/driver for additional parameters
needed by the implementation
\Note
This interface is tentative, limited to the desired function
enum ia_css_fw_warning {
IA_CSS_FW_WARNING_NONE,
IA_CSS_FW_WARNING_ISYS_QUEUE_FULL, /* < CSS system delayed because of insufficient space in the ISys queue.
- This warning can be avoided by de-queing ISYS buffers more timely. */
+ This warning can be avoided by de-queuing ISYS buffers more timely. */
IA_CSS_FW_WARNING_PSYS_QUEUE_FULL, /* < CSS system delayed because of insufficient space in the PSys queue.
- This warning can be avoided by de-queing PSYS buffers more timely. */
+ This warning can be avoided by de-queuing PSYS buffers more timely. */
IA_CSS_FW_WARNING_CIRCBUF_ALL_LOCKED, /* < CSS system delayed because of insufficient available buffers.
This warning can be avoided by unlocking locked frame-buffers more timely. */
IA_CSS_FW_WARNING_EXP_ID_LOCKED, /* < Exposure ID skipped because the frame associated to it was still locked.
* @param[in] and_mask Binary or of enum ia_css_event_irq_mask_type. An event
IRQ for the Host is only raised after all pipe related
events have occurred at least once for all the active
- pipes. Events are remembered and don't need to occure
+ pipes. Events are remembered and don't need to occurred
at the same moment in time. There is no control over
the order of these events. Once an IRQ has been raised
all remembered events are reset.
bool pack_raw_pixels; /** Pack pixels in the raw buffers */
bool continuous; /** Use SP copy feature to continuously capture frames
to system memory and run pipes in offline mode */
- bool disable_cont_viewfinder; /** disable continous viewfinder for ZSL use case */
+ bool disable_cont_viewfinder; /** disable continuous viewfinder for ZSL use case */
int32_t flash_gpio_pin; /** pin on which the flash is connected, -1 for no flash */
int left_padding; /** The number of input-formatter left-paddings, -1 for default from binary.*/
struct ia_css_mipi_buffer_config mipi_buffer_config; /** mipi buffer configuration */
int dy_shift = dy << shift_val;
int slope, dydx;
- /*Protection for paramater values, & avoiding zero divisions*/
+ /*Protection for parameter values, & avoiding zero divisions*/
assert(y0 >= 0 && y0 <= max_slope);
assert(y1 >= 0 && y1 <= max_slope);
assert(x0 >= 0 && x0 <= max_slope);
{
unsigned i, j;
const unsigned shffl_blck = 4;
- const unsigned lenght_zeros = 11;
+ const unsigned length_zeros = 11;
short dydx0, dydx1, dydx2, dydx3, dydx4;
(void)size;
to->e_y_slope[0][(i << shffl_blck) + 3] = dydx3;
to->e_y_slope[0][(i << shffl_blck) + 4] = dydx4;
- for (j = 0; j < lenght_zeros; j++) {
+ for (j = 0; j < length_zeros; j++) {
to->y_x[0][(i << shffl_blck) + 5 + j] = 0;
to->y_y[0][(i << shffl_blck) + 5 + j] = 0;
to->e_y_slope[0][(i << shffl_blck)+ 5 + j] = 0;
/**
* \brief HDR Irradiance Parameters
- * \detail Currently HDR paramters are used only for testing purposes
+ * \detail Currently HDR parameters are used only for testing purposes
*/
struct ia_css_hdr_irradiance_params {
int test_irr; /** Test parameter */
/**
* \brief HDR Deghosting Parameters
- * \detail Currently HDR paramters are used only for testing purposes
+ * \detail Currently HDR parameters are used only for testing purposes
*/
struct ia_css_hdr_deghost_params {
int test_deg; /** Test parameter */
/**
* \brief HDR Exclusion Parameters
- * \detail Currently HDR paramters are used only for testing purposes
+ * \detail Currently HDR parameters are used only for testing purposes
*/
struct ia_css_hdr_exclusion_params {
int test_excl; /** Test parameter */
/**
* \brief HDR public paramterers.
- * \details Struct with all paramters for HDR that can be seet from
- * the CSS API. Currenly, only test paramters are defined.
+ * \details Struct with all parameters for HDR that can be seet from
+ * the CSS API. Currenly, only test parameters are defined.
*/
struct ia_css_hdr_config {
- struct ia_css_hdr_irradiance_params irradiance; /** HDR irradiance paramaters */
+ struct ia_css_hdr_irradiance_params irradiance; /** HDR irradiance parameters */
struct ia_css_hdr_deghost_params deghost; /** HDR deghosting parameters */
struct ia_css_hdr_exclusion_params exclusion; /** HDR exclusion parameters */
};
ia_css_binary_max_vf_width(void)
{
/* This is (should be) true for IPU1 and IPU2 */
- /* For IPU3 (SkyCam) this pointer is guarenteed to be NULL simply because such a binary does not exist */
+ /* For IPU3 (SkyCam) this pointer is guaranteed to be NULL simply because such a binary does not exist */
if (binary_infos[IA_CSS_BINARY_MODE_VF_PP])
return binary_infos[IA_CSS_BINARY_MODE_VF_PP]->sp.output.max_width;
return 0;
/**
- * @brief Initilize buffer type to a queue id mapping
+ * @brief Initialize buffer type to a queue id mapping
* @return none
*/
void ia_css_queue_map_init(void);
if (l <= ENABLE_LINE_MAX_LENGTH) {
/* The 2nd line fits */
/* we cannot use ei as argument because
- * it is not guarenteed dword aligned
+ * it is not guaranteed dword aligned
*/
strncpy_s(enable_info2,
sizeof(enable_info2),
if (l <= ENABLE_LINE_MAX_LENGTH) {
/* The 3rd line fits */
/* we cannot use ei as argument because
- * it is not guarenteed dword aligned
+ * it is not guaranteed dword aligned
*/
strcpy_s(enable_info3,
sizeof(enable_info3), ei);
return 2; /* bytes per pixel */
/* Note: Essentially NV12_16 is a 2 bytes per pixel format, this return value is used
* to configure DMA for the output buffer,
- * At least in SKC this data is overwriten by isp_output_init.sp.c except for elements(elems),
+ * At least in SKC this data is overwritten by isp_output_init.sp.c except for elements(elems),
* which is configured from this return value,
* NV12_16 is implemented by a double buffer of 8 bit elements hence elems should be configured as 8 */
if (info->format == IA_CSS_FRAME_FORMAT_NV12_16)
uint32_t fw_handle,
struct ia_css_pipeline_stage **stage);
-/* @brief Gets the Firmware handle correponding the stage num from the pipeline
+/* @brief Gets the Firmware handle corresponding the stage num from the pipeline
*
* @param[in] pipeline
* @param[in] stage_num
return;
sh_css_print("%s histogram length = %d\n", core_name, hist->length);
- sh_css_print("%s PC\trun\tstall\n", core_name);
+ sh_css_print("%s PC\turn\tstall\n", core_name);
for (i = 0; i < hist->length; i++) {
if ((hist->run[i] == 0) && (hist->run[i] == hist->stall[i]))
#define SH_CSS_SP_DBG_NR_OF_TRACES (1)
#define SH_CSS_SP_DBG_TRACE_DEPTH (40)
#else
-/* E.g. if you like seperate traces for 4 threads */
+/* E.g. if you like separate traces for 4 threads */
#define SH_CSS_SP_DBG_NR_OF_TRACES (4)
#define SH_CSS_SP_DBG_TRACE_DEPTH (10)
#endif
* Bit 31...24: unused.
* Bit 23...16: unused.
* Bit 15...08: reading-request enabling bits for DMA channel 7..0
- * Bit 07...00: writing-reqeust enabling bits for DMA channel 7..0
+ * Bit 07...00: writing-request enabling bits for DMA channel 7..0
*
* For example, "0...0 0...0 11111011 11111101" indicates that the
* writing request through DMA Channel 1 and the reading request
/*
* The first frames (with comment Dynamic) can be dynamic or static
* The other frames (ref_in and below) can only be static
- * Static means that the data addres will not change during the life time
+ * Static means that the data address will not change during the life time
* of the associated pipe. Dynamic means that the data address can
* change with every (frame) iteration of the associated pipe
*
- * s3a and dis are now also dynamic but (stil) handled seperately
+ * s3a and dis are now also dynamic but (stil) handled separately
*/
#define SH_CSS_NUM_DYNAMIC_FRAME_IDS (3)
/* Information for a single pipeline stage for an ISP */
struct sh_css_isp_stage {
/*
- * For compatability and portabilty, only types
+ * For compatibility and portabilty, only types
* from "stdint.h" are allowed
*
* Use of "enum" and "bool" is prohibited
/* Information for a single pipeline stage */
struct sh_css_sp_stage {
/*
- * For compatability and portabilty, only types
+ * For compatibility and portabilty, only types
* from "stdint.h" are allowed
*
* Use of "enum" and "bool" is prohibited
* Note:
* Group all host initialized SP variables into this struct.
* This is initialized every stage through dma.
- * The stage part itself is transfered through sh_css_sp_stage.
+ * The stage part itself is transferred through sh_css_sp_stage.
*/
struct sh_css_sp_group {
struct sh_css_sp_config config;
struct host_sp_communication {
/*
* Don't use enum host2sp_commands, because the sizeof an enum is
- * compiler dependant and thus non-portable
+ * compiler dependent and thus non-portable
*/
uint32_t host2sp_command;
cur_map_size = ¶ms->pipe_ddr_ptrs_size[pipeline->pipe_id];
/* TODO: Normally, zoom and motion parameters shouldn't
- * be part of "isp_params" as it is resolution/pipe dependant
+ * be part of "isp_params" as it is resolution/pipe dependent
* Therefore, move the zoom config elsewhere (e.g. shading
* table can be taken as an example! @GC
* */
/*
* Frame data is no longer part of the sp_stage structure but part of a
- * seperate structure. The aim is to make the sp_data struct static
+ * separate structure. The aim is to make the sp_data struct static
* (it defines a pipeline) and that the dynamic (per frame) data is stored
* separetly.
*
/*
* rvanimme: don't clean it to save static frame info line ref_in
* ref_out, and tnr_frames. Once this static data is in a
- * seperate data struct, this may be enable (but still, there is
+ * separate data struct, this may be enable (but still, there is
* no need for it)
*/
}
vma->vm_flags |= VM_IO|VM_DONTEXPAND|VM_DONTDUMP;
/*
- * call hmm_bo_vm_open explictly.
+ * call hmm_bo_vm_open explicitly.
*/
hmm_bo_vm_open(vma);
void isp_mmu_exit(struct isp_mmu *mmu);
/*
- * setup/remove address mapping for pgnr continous physical pages
+ * setup/remove address mapping for pgnr continuous physical pages
* and isp_virt.
*
* map/unmap is mutex lock protected, and caller does not have
phys_addr_t l2_pt, unsigned int l2_idx,
unsigned int isp_virt, unsigned int pte)
{
- dev_err(atomisp_dev, "unmap unvalid L2 pte:\n\n"
+ dev_err(atomisp_dev, "unmap invalid L2 pte:\n\n"
"\tL1 PT: virt = %p, phys = 0x%llx, "
"idx = %d\n"
"\tL2 PT: virt = %p, phys = 0x%llx, "
phys_addr_t l1_pt, unsigned int l1_idx,
unsigned int isp_virt, unsigned int pte)
{
- dev_err(atomisp_dev, "unmap unvalid L1 pte (L2 PT):\n\n"
+ dev_err(atomisp_dev, "unmap invalid L1 pte (L2 PT):\n\n"
"\tL1 PT: virt = %p, phys = 0x%llx, "
"idx = %d\n"
"\tisp_virt = 0x%x, l1_pte(L2 PT) = 0x%x\n",
static void mmu_unmap_l1_pt_error(struct isp_mmu *mmu, unsigned int pte)
{
- dev_err(atomisp_dev, "unmap unvalid L1PT:\n\n"
+ dev_err(atomisp_dev, "unmap invalid L1PT:\n\n"
"L1PT = 0x%x\n", (unsigned int)pte);
}
projects / mirror_ubuntu-kernels.git / commitdiff