DEF_HELPER_3(bcdcfsq, i32, avr, avr, i32)
DEF_HELPER_3(bcdctsq, i32, avr, avr, i32)
DEF_HELPER_4(bcdcpsgn, i32, avr, avr, avr, i32)
+DEF_HELPER_3(bcdsetsgn, i32, avr, avr, i32)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
return bcd_cmp_zero(r);
}
+uint32_t helper_bcdsetsgn(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
+{
+ int i;
+ int invalid = 0;
+ int sgnb = bcd_get_sgn(b);
+
+ *r = *b;
+ bcd_put_digit(r, bcd_preferred_sgn(sgnb, ps), 0);
+
+ for (i = 1; i < 32; i++) {
+ bcd_get_digit(b, i, &invalid);
+ if (unlikely(invalid)) {
+ return CRF_SO;
+ }
+ }
+
+ return bcd_cmp_zero(r);
+}
+
void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
{
int i;
GEN_BCD2(bcdctz)
GEN_BCD2(bcdcfsq)
GEN_BCD2(bcdctsq)
+GEN_BCD2(bcdsetsgn)
GEN_BCD(bcdcpsgn);
static void gen_xpnd04_1(DisasContext *ctx)
case 7:
gen_bcdcfn(ctx);
break;
+ case 31:
+ gen_bcdsetsgn(ctx);
+ break;
default:
gen_invalid(ctx);
break;
case 7:
gen_bcdcfn(ctx);
break;
+ case 31:
+ gen_bcdsetsgn(ctx);
+ break;
default:
gen_invalid(ctx);
break;
}
}
+
GEN_VXFORM_DUAL(vsubcuw, PPC_ALTIVEC, PPC_NONE, \
xpnd04_1, PPC_NONE, PPC2_ISA300)
GEN_VXFORM_DUAL(vsubsws, PPC_ALTIVEC, PPC_NONE, \