drm/amdgpu: replace indirect mmio access in non-dc code path

all the mmCUR_CONTROL instances are in mmr range and
can be accessd directly by using RREG32/WREG32

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 2512e7ebfedf2ef00be981a5528b5981dba555ec..e38744d06f4e51c390479f11c7a0eb65ca98a781 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2303,9 +2303,9 @@ static void dce_v10_0_hide_cursor(struct drm_crtc *crtc)
        struct amdgpu_device *adev = crtc->dev->dev_private;
        u32 tmp;
 
-       tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
+       tmp = RREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
        tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 0);
-       WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
+       WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
 }
 
 static void dce_v10_0_show_cursor(struct drm_crtc *crtc)
@@ -2319,10 +2319,10 @@ static void dce_v10_0_show_cursor(struct drm_crtc *crtc)
        WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,
               lower_32_bits(amdgpu_crtc->cursor_addr));
 
-       tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
+       tmp = RREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
        tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 1);
        tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_MODE, 2);
-       WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
+       WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
 }
 
 static int dce_v10_0_cursor_move_locked(struct drm_crtc *crtc,

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 0dde22db9848690f1e50c3be0e819ed03151aece..2584ff74423bc391e9971a514ef641ec7185c13d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2382,9 +2382,9 @@ static void dce_v11_0_hide_cursor(struct drm_crtc *crtc)
        struct amdgpu_device *adev = crtc->dev->dev_private;
        u32 tmp;
 
-       tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
+       tmp = RREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
        tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 0);
-       WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
+       WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
 }
 
 static void dce_v11_0_show_cursor(struct drm_crtc *crtc)
@@ -2398,10 +2398,10 @@ static void dce_v11_0_show_cursor(struct drm_crtc *crtc)
        WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,
               lower_32_bits(amdgpu_crtc->cursor_addr));
 
-       tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
+       tmp = RREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
        tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 1);
        tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_MODE, 2);
-       WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
+       WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
 }
 
 static int dce_v11_0_cursor_move_locked(struct drm_crtc *crtc,

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 84219534bd38c6ac3f73749b977605c7b161b593..d05c39f9ae40ebda7975c507d21dd9d00c02764e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2194,9 +2194,9 @@ static void dce_v6_0_hide_cursor(struct drm_crtc *crtc)
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct amdgpu_device *adev = crtc->dev->dev_private;
 
-       WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
-                  (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) |
-                  (CURSOR_URGENT_1_2 << CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));
+       WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
+              (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) |
+              (CURSOR_URGENT_1_2 << CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));
 
 
 }
@@ -2211,10 +2211,10 @@ static void dce_v6_0_show_cursor(struct drm_crtc *crtc)
        WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,
               lower_32_bits(amdgpu_crtc->cursor_addr));
 
-       WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
-                  CUR_CONTROL__CURSOR_EN_MASK |
-                  (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) |
-                  (CURSOR_URGENT_1_2 << CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));
+       WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
+              CUR_CONTROL__CURSOR_EN_MASK |
+              (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) |
+              (CURSOR_URGENT_1_2 << CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));
 
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 3a640702d7d193ad44bb216fe7ace2b0507df236..ad0f8adb6a2b61d7c06674db2c18063b3ed480ce 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2205,9 +2205,9 @@ static void dce_v8_0_hide_cursor(struct drm_crtc *crtc)
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct amdgpu_device *adev = crtc->dev->dev_private;
 
-       WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
-                  (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) |
-                  (CURSOR_URGENT_1_2 << CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));
+       WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
+              (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) |
+              (CURSOR_URGENT_1_2 << CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));
 }
 
 static void dce_v8_0_show_cursor(struct drm_crtc *crtc)
@@ -2220,10 +2220,10 @@ static void dce_v8_0_show_cursor(struct drm_crtc *crtc)
        WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,
               lower_32_bits(amdgpu_crtc->cursor_addr));
 
-       WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
-                  CUR_CONTROL__CURSOR_EN_MASK |
-                  (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) |
-                  (CURSOR_URGENT_1_2 << CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));
+       WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
+              CUR_CONTROL__CURSOR_EN_MASK |
+              (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) |
+              (CURSOR_URGENT_1_2 << CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));
 }
 
 static int dce_v8_0_cursor_move_locked(struct drm_crtc *crtc,