]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
drm/xe: explicitly set GGTT access for GuC DMA
authorFei Yang <fei.yang@intel.com>
Wed, 22 Nov 2023 20:45:01 +0000 (12:45 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:45:07 +0000 (11:45 -0500)
Confirmed with hardware that setting GGTT memory access for GuC
firmware loading is correct for all platforms and required for
new platforms going forward.

Signed-off-by: Fei Yang <fei.yang@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20231122204501.1353325-2-fei.yang@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/regs/xe_guc_regs.h
drivers/gpu/drm/xe/xe_uc_fw.c

index ba375fc51a87ad95bad943fad0dee6bc5a8e0100..92320bbc9d3d93b342dac336017dfbb8ecc3d093 100644 (file)
@@ -70,6 +70,7 @@
 #define DMA_ADDR_1_HIGH                                XE_REG(0xc30c)
 #define   DMA_ADDR_SPACE_MASK                  REG_GENMASK(20, 16)
 #define   DMA_ADDRESS_SPACE_WOPCM              REG_FIELD_PREP(DMA_ADDR_SPACE_MASK, 7)
+#define   DMA_ADDRESS_SPACE_GGTT               REG_FIELD_PREP(DMA_ADDR_SPACE_MASK, 8)
 #define DMA_COPY_SIZE                          XE_REG(0xc310)
 #define DMA_CTRL                               XE_REG(0xc314)
 #define   HUC_UKERNEL                          REG_BIT(9)
index 2fcec528a1d1452a66ffa2461050a2b4e6aa9fe9..e806e7b6ae424e5ae076578e648bfdd64366f5d8 100644 (file)
@@ -746,7 +746,8 @@ static int uc_fw_xfer(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags)
        /* Set the source address for the uCode */
        src_offset = uc_fw_ggtt_offset(uc_fw) + uc_fw->css_offset;
        xe_mmio_write32(gt, DMA_ADDR_0_LOW, lower_32_bits(src_offset));
-       xe_mmio_write32(gt, DMA_ADDR_0_HIGH, upper_32_bits(src_offset));
+       xe_mmio_write32(gt, DMA_ADDR_0_HIGH,
+                       upper_32_bits(src_offset) | DMA_ADDRESS_SPACE_GGTT);
 
        /* Set the DMA destination */
        xe_mmio_write32(gt, DMA_ADDR_1_LOW, offset);