UBUNTU: SAUCE: arm64: arch_timer: Workaround for Cortex-A73 erratum 858921

BugLink: https://bugs.launchpad.net/bugs/1675509
Cortex-A73 (all versions) counter read can return a wrong value
when the counter crosses a 32bit boundary.

The workaround involves performing the read twice, and to return
one or the other depending on whether a transition has taken place.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
(cherry picked from commit 7b1f8a2afb42458f5878060aec51ad9c28cbf653
 in the timers/errata-rework branch of
 git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git)
Signed-off-by: dann frazier <dann.frazier@canonical.com>
Signed-off-by: Seth Forshee <seth.forshee@canonical.com>

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 17ee71ccb8e5eca2be68db45640b4ffd43f07c5e..eb04d86ae9761f67bcd5037e28ffc3f22467b528 100644 (file)
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -349,6 +349,17 @@ config HISILICON_ERRATUM_161010101
          161010101. The workaround will be active if the hisilicon,erratum-161010101
          property is found in the timer node.
 
+config ARM64_ERRATUM_858921
+       bool "Workaround for Cortex-A73 erratum 858921"
+       default y
+       select ARM_ARCH_TIMER_OOL_WORKAROUND
+       depends on ARM_ARCH_TIMER && ARM64
+       help
+         This option enables a workaround applicable to Cortex-A73
+         (all versions), whose counter may return incorrect values.
+         The workaround will be dynamically enabled when an affected
+         core is detected.
+
 config ARM_GLOBAL_TIMER
        bool "Support for the ARM global timer" if COMPILE_TEST
        select CLKSRC_OF if OF

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index a9d1b86653f896d88b8686b77246eabde2ed8ed1..3b6844a7fe5144ddfd7e220c2b798cb8a74e70e9 100644 (file)
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -265,6 +265,17 @@ static u64 notrace hisi_161010101_read_cntvct_el0(void)
 }
 #endif
 
+#ifdef CONFIG_ARM64_ERRATUM_858921
+static u64 notrace arm64_858921_read_cntvct_el0(void)
+{
+       u64 old, new;
+
+       old = read_sysreg(cntvct_el0);
+       new = read_sysreg(cntvct_el0);
+       return (((old ^ new) >> 32) & 1) ? old : new;
+}
+#endif
+
 #ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
 DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *,
               timer_unstable_counter_workaround);
@@ -330,6 +341,14 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
                .set_next_event_virt = erratum_set_next_event_tval_virt,
        },
 #endif
+#ifdef CONFIG_ARM64_ERRATUM_858921
+       {
+               .match_type = ate_match_local_cap_id,
+               .id = (void *)ARM64_WORKAROUND_858921,
+               .desc = "ARM erratum 858921",
+               .read_cntvct_el0 = arm64_858921_read_cntvct_el0,
+       },
+#endif
 };
 
 typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,