drm/amd/display: Set max TTU on DPG enable

[WHY]
There is a bug in HW that causes P-State to hang when DPG is enabled in
certain conditions.

[HOW]
The solution is to force MIN_TTU_VBLANK register to maximum value
whenever DPG has been enabled.
Make stream do a full update on test pattern change, so that the TTUs
get updated.
When DPG is enabled, update the ttu_regs.min_ttu_vblank field of each
pipe in the stream's topology to the maximum value (0xffffff).

v2: squash in build fix for when DCN is not defined (Alex)

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 7a0f5057f0ff91460de334aa979696a7760c5586..91784bba5264cd2df41bbffb0f6fbfd7198e83cd 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -49,6 +49,7 @@
 #include "timing_generator.h"
 #include "abm.h"
 #include "virtual/virtual_link_encoder.h"
+#include "hubp.h"
 
 #include "link_hwss.h"
 #include "link_encoder.h"
@@ -2095,6 +2096,10 @@ static enum surface_update_type check_update_surfaces_for_stream(
        if (stream_status == NULL || stream_status->plane_count != surface_count)
                overall_type = UPDATE_TYPE_FULL;
 
+       if (stream_update && stream_update->pending_test_pattern) {
+               overall_type = UPDATE_TYPE_FULL;
+       }
+
        /* some stream updates require passive update */
        if (stream_update) {
                union stream_update_flags *su_flags = &stream_update->stream->update_flags;
@@ -2491,6 +2496,14 @@ static void commit_planes_do_stream_update(struct dc *dc,
                                }
                        }
 
+
+                       /* Full fe update*/
+                       if (update_type == UPDATE_TYPE_FAST)
+                               continue;
+
+                       if (stream_update->dsc_config)
+                               dp_update_dsc_config(pipe_ctx);
+
                        if (stream_update->pending_test_pattern) {
                                dc_link_dp_set_test_pattern(stream->link,
                                        stream->test_pattern.type,
@@ -2500,13 +2513,6 @@ static void commit_planes_do_stream_update(struct dc *dc,
                                        stream->test_pattern.cust_pattern_size);
                        }
 
-                       /* Full fe update*/
-                       if (update_type == UPDATE_TYPE_FAST)
-                               continue;
-
-                       if (stream_update->dsc_config)
-                               dp_update_dsc_config(pipe_ctx);
-
                        if (stream_update->dpms_off) {
                                if (*stream_update->dpms_off) {
                                        core_link_disable_stream(pipe_ctx);
@@ -2593,6 +2599,17 @@ static void commit_planes_for_stream(struct dc *dc,
                }
        }
 
+#ifdef CONFIG_DRM_AMD_DC_DCN
+       if (stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE) {
+               struct pipe_ctx *mpcc_pipe;
+               struct pipe_ctx *odm_pipe;
+
+               for (mpcc_pipe = top_pipe_to_program; mpcc_pipe; mpcc_pipe = mpcc_pipe->bottom_pipe)
+                       for (odm_pipe = mpcc_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe)
+                               odm_pipe->ttu_regs.min_ttu_vblank = MAX_TTU;
+       }
+#endif
+
        if ((update_type != UPDATE_TYPE_FAST) && stream->update_flags.bits.dsc_changed)
                if (top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_enable) {
                        if (should_use_dmub_lock(stream->link)) {

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
index 346dcd87dc10651b28bab509b314f21cb89f4c8e..80e1a32bc63dac04216072d047bec4b805975eca 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
@@ -29,6 +29,7 @@
 #include "mem_input.h"
 
 #define OPP_ID_INVALID 0xf
+#define MAX_TTU 0xffffff
 
 
 enum cursor_pitch {