Add the (previously omitted) Ether/PHY pin data to the SK-RZG1E board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
groups = "scif2_data";
function = "scif2";
};
+
+ ether_pins: ether {
+ groups = "eth_link", "eth_mdio", "eth_rmii";
+ function = "eth";
+ };
+
+ phy1_pins: phy1 {
+ groups = "intc_irq8";
+ function = "intc";
+ };
};
&scif2 {
};
ðer {
+ pinctrl-0 = <ðer_pins &phy1_pins>;
+ pinctrl-names = "default";
+
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "okay";