ARM: dts: rockchip: add rk3288 arm-pmu irq affinity

The rk3288 uses spi irqs for the arm-pmu on individual cpu cores, so needs
the affinity to them defined.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 22e9221877c6ee3bbbf5aa778de36380deb337ea..2db91c9ccac2e694b70d2235ddd723ac0a373209 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -78,6 +78,7 @@
                             <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
        };
 
        cpus {
@@ -110,19 +111,19 @@
                        clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                };
-               cpu@501 {
+               cpu1: cpu@501 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a12";
                        reg = <0x501>;
                        resets = <&cru SRST_CORE1>;
                };
-               cpu@502 {
+               cpu2: cpu@502 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a12";
                        reg = <0x502>;
                        resets = <&cru SRST_CORE2>;
                };
-               cpu@503 {
+               cpu3: cpu@503 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a12";
                        reg = <0x503>;