powerpc: Implement smp_cond_load_relaxed()

This implements smp_cond_load_relaxed() with the slowpath busy loop
using the preferred SMT priority pattern.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Waiman Long <longman@redhat.com>
[mpe: Make it 64-bit only to fix build errors on 32-bit]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200724131423.1362108-7-npiggin@gmail.com

diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h
index 35c1b8f3aa683aa6c85fc903c0ab1fde9f1b1af0..f53c4238083273560c8764c0e449c16cb40c6496 100644 (file)
--- a/arch/powerpc/include/asm/barrier.h
+++ b/arch/powerpc/include/asm/barrier.h
@@ -80,6 +80,22 @@ do {                                                                 \
        ___p1;                                                          \
 })
 
+#ifdef CONFIG_PPC64
+#define smp_cond_load_relaxed(ptr, cond_expr) ({               \
+       typeof(ptr) __PTR = (ptr);                              \
+       __unqual_scalar_typeof(*ptr) VAL;                       \
+       VAL = READ_ONCE(*__PTR);                                \
+       if (unlikely(!(cond_expr))) {                           \
+               spin_begin();                                   \
+               do {                                            \
+                       VAL = READ_ONCE(*__PTR);                \
+               } while (!(cond_expr));                         \
+               spin_end();                                     \
+       }                                                       \
+       (typeof(*ptr))VAL;                                      \
+})
+#endif
+
 #ifdef CONFIG_PPC_BOOK3S_64
 #define NOSPEC_BARRIER_SLOT   nop
 #elif defined(CONFIG_PPC_FSL_BOOK3E)