rkisp1_write(rkisp1, RKISP1_CIF_ISP_DEMOSAIC_TH(0xc),
RKISP1_CIF_ISP_DEMOSAIC);
- if (sensor->mbus.type == V4L2_MBUS_BT656)
+ if (sensor->mbus_type == V4L2_MBUS_BT656)
isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU656;
else
isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601;
}
} else if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) {
acq_mult = 2;
- if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) {
+ if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) {
isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601;
} else {
- if (sensor->mbus.type == V4L2_MBUS_BT656)
+ if (sensor->mbus_type == V4L2_MBUS_BT656)
isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656;
else
isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601;
}
/* Set up input acquisition properties */
- if (sensor->mbus.type == V4L2_MBUS_BT656 ||
- sensor->mbus.type == V4L2_MBUS_PARALLEL) {
- if (sensor->mbus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
+ if (sensor->mbus_type == V4L2_MBUS_BT656 ||
+ sensor->mbus_type == V4L2_MBUS_PARALLEL) {
+ if (sensor->mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
signal = RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE;
}
- if (sensor->mbus.type == V4L2_MBUS_PARALLEL) {
- if (sensor->mbus.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
+ if (sensor->mbus_type == V4L2_MBUS_PARALLEL) {
+ if (sensor->mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
signal |= RKISP1_CIF_ISP_ACQ_PROP_VSYNC_LOW;
- if (sensor->mbus.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
+ if (sensor->mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
signal |= RKISP1_CIF_ISP_ACQ_PROP_HSYNC_LOW;
}
static int rkisp1_config_mipi(struct rkisp1_device *rkisp1)
{
const struct rkisp1_isp_mbus_info *sink_fmt = rkisp1->isp.sink_fmt;
- unsigned int lanes;
+ unsigned int lanes = rkisp1->active_sensor->lanes;
u32 mipi_ctrl;
- /*
- * rkisp1->active_sensor->mbus is set in isp or d-phy notifier_bound
- * function
- */
- switch (rkisp1->active_sensor->mbus.flags & V4L2_MBUS_CSI2_LANES) {
- case V4L2_MBUS_CSI2_4_LANE:
- lanes = 4;
- break;
- case V4L2_MBUS_CSI2_3_LANE:
- lanes = 3;
- break;
- case V4L2_MBUS_CSI2_2_LANE:
- lanes = 2;
- break;
- case V4L2_MBUS_CSI2_1_LANE:
- lanes = 1;
- break;
- default:
+ if (lanes < 1 || lanes > 4)
return -EINVAL;
- }
mipi_ctrl = RKISP1_CIF_MIPI_CTRL_NUM_LANES(lanes - 1) |
RKISP1_CIF_MIPI_CTRL_SHUTDOWNLANES(0xf) |
u32 dpcl = rkisp1_read(rkisp1, RKISP1_CIF_VI_DPCL);
int ret = 0;
- if (sensor->mbus.type == V4L2_MBUS_BT656 ||
- sensor->mbus.type == V4L2_MBUS_PARALLEL) {
+ if (sensor->mbus_type == V4L2_MBUS_BT656 ||
+ sensor->mbus_type == V4L2_MBUS_PARALLEL) {
ret = rkisp1_config_dvp(rkisp1);
dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_PARALLEL;
- } else if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) {
+ } else if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) {
ret = rkisp1_config_mipi(rkisp1);
dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_MIPI;
}
rkisp1_config_clk(rkisp1);
/* Activate MIPI */
- if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) {
+ if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) {
val = rkisp1_read(rkisp1, RKISP1_CIF_MIPI_CTRL);
rkisp1_write(rkisp1, val | RKISP1_CIF_MIPI_CTRL_OUTPUT_ENA,
RKISP1_CIF_MIPI_CTRL);
rkisp1->active_sensor = container_of(sensor_sd->asd,
struct rkisp1_sensor_async, asd);
- if (rkisp1->active_sensor->mbus.type != V4L2_MBUS_CSI2_DPHY)
+ if (rkisp1->active_sensor->mbus_type != V4L2_MBUS_CSI2_DPHY)
return -EINVAL;
atomic_set(&rkisp1->isp.frame_sequence, -1);