]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Thu, 1 Jun 2023 09:39:07 +0000 (11:39 +0200)
committerBjorn Andersson <andersson@kernel.org>
Tue, 13 Jun 2023 23:15:04 +0000 (16:15 -0700)
The "vanilla" Alpha PLL configs are sometimes provided with an intention
to only update certain bits of th register.

Do so if a mask is found.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Iskren Chernev <me@iskren.info>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230601-topic-alpha_ctl-v1-1-b6a932dfcf68@linaro.org
drivers/clk/qcom/clk-alpha-pll.c
drivers/clk/qcom/clk-alpha-pll.h

index f81c7c561352c52de877dfafff7b80068129fe10..e4ef645f65d1fd9ca1889d3b170100dae6b71814 100644 (file)
@@ -384,10 +384,21 @@ void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
 
        regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
 
-       clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
-                                               config->test_ctl_val);
-       clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
-                                               config->test_ctl_hi_val);
+       if (config->test_ctl_mask)
+               regmap_update_bits(regmap, PLL_TEST_CTL(pll),
+                                  config->test_ctl_mask,
+                                  config->test_ctl_val);
+       else
+               clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
+                                          config->test_ctl_val);
+
+       if (config->test_ctl_hi_mask)
+               regmap_update_bits(regmap, PLL_TEST_CTL_U(pll),
+                                  config->test_ctl_hi_mask,
+                                  config->test_ctl_hi_val);
+       else
+               clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
+                                          config->test_ctl_hi_val);
 
        if (pll->flags & SUPPORTS_FSM_MODE)
                qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);
index 6ff0d08eb938d2781fcf01e293504069c3a0ab66..e4bd863027ab63701b72e93f8943c6287dae7358 100644 (file)
@@ -123,7 +123,9 @@ struct alpha_pll_config {
        u32 user_ctl_hi_val;
        u32 user_ctl_hi1_val;
        u32 test_ctl_val;
+       u32 test_ctl_mask;
        u32 test_ctl_hi_val;
+       u32 test_ctl_hi_mask;
        u32 test_ctl_hi1_val;
        u32 test_ctl_hi2_val;
        u32 main_output_mask;