]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
drm/tegra: Fix SMMU support on Tegra124 and Tegra210
authorThierry Reding <treding@nvidia.com>
Wed, 25 Mar 2020 20:16:03 +0000 (21:16 +0100)
committerThierry Reding <treding@nvidia.com>
Tue, 28 Apr 2020 09:44:07 +0000 (11:44 +0200)
When testing whether or not to enable the use of the SMMU, consult the
supported DMA mask rather than the actually configured DMA mask, since
the latter might already have been restricted.

Fixes: 2d9384ff9177 ("drm/tegra: Relax IOMMU usage criteria on old Tegra")
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/drm/tegra/drm.c
drivers/gpu/host1x/dev.c
include/linux/host1x.h

index bd268028fb3d625c9c637b642a540d0e008dcfab..583cd6e0ae27faa454f32243de79b7a5d703ac8f 100644 (file)
@@ -1039,6 +1039,7 @@ void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
 
 static bool host1x_drm_wants_iommu(struct host1x_device *dev)
 {
+       struct host1x *host1x = dev_get_drvdata(dev->dev.parent);
        struct iommu_domain *domain;
 
        /*
@@ -1076,7 +1077,7 @@ static bool host1x_drm_wants_iommu(struct host1x_device *dev)
         * sufficient and whether or not the host1x is attached to an IOMMU
         * doesn't matter.
         */
-       if (!domain && dma_get_mask(dev->dev.parent) <= DMA_BIT_MASK(32))
+       if (!domain && host1x_get_dma_mask(host1x) <= DMA_BIT_MASK(32))
                return true;
 
        return domain != NULL;
index 388bcc2889aaf2e763a702e3e4c4aafd8434f080..40a4b9f8b861a4f4d0d7b010816d074d6d711998 100644 (file)
@@ -502,6 +502,19 @@ static void __exit tegra_host1x_exit(void)
 }
 module_exit(tegra_host1x_exit);
 
+/**
+ * host1x_get_dma_mask() - query the supported DMA mask for host1x
+ * @host1x: host1x instance
+ *
+ * Note that this returns the supported DMA mask for host1x, which can be
+ * different from the applicable DMA mask under certain circumstances.
+ */
+u64 host1x_get_dma_mask(struct host1x *host1x)
+{
+       return host1x->info->dma_mask;
+}
+EXPORT_SYMBOL(host1x_get_dma_mask);
+
 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
 MODULE_AUTHOR("Terje Bergstrom <tbergstrom@nvidia.com>");
 MODULE_DESCRIPTION("Host1x driver for Tegra products");
index 62d216ff1097940c3d28626213d4e581589637ef..c230b4e70d759283100a4e496907c3245722d235 100644 (file)
@@ -17,9 +17,12 @@ enum host1x_class {
        HOST1X_CLASS_GR3D = 0x60,
 };
 
+struct host1x;
 struct host1x_client;
 struct iommu_group;
 
+u64 host1x_get_dma_mask(struct host1x *host1x);
+
 /**
  * struct host1x_client_ops - host1x client operations
  * @init: host1x client initialization code