spi: spi-fsl-dspi: use XSPI mode instead of DMA for DPAA2 SoCs

The arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi device tree lacks DMA
channels for DSPI, so naturally, the driver fails to probe:

[ 2.945302] fsl-dspi 2100000.spi: rx dma channel not available
[ 2.951134] fsl-dspi 2100000.spi: can't get dma channels

In retrospect, this should have been obvious, because LS2080A, LS2085A
LS2088A and LX2160A don't appear to have an eDMA module at all. Looking
again at their datasheets, the CTARE register (which is specific to XSPI
functionality) seems to be documented, so switch them to XSPI mode
instead.

Fixes: 0feaf8f5afe0 ("spi: spi-fsl-dspi: Convert the instantiations that support it to DMA")
Reported-by: Qiang Zhao <qiang.zhao@nxp.com>
Tested-by: Qiang Zhao <qiang.zhao@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://lore.kernel.org/r/20200910121532.1138596-1-olteanv@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 91c6affe139c998bb0d51d0d1216acf1ca2c8101..283f2468a2f4628bbad0f4b674d327ab514f1ee2 100644 (file)
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -174,17 +174,17 @@ static const struct fsl_dspi_devtype_data devtype_data[] = {
                .fifo_size              = 16,
        },
        [LS2080A] = {
-               .trans_mode             = DSPI_DMA_MODE,
+               .trans_mode             = DSPI_XSPI_MODE,
                .max_clock_factor       = 8,
                .fifo_size              = 4,
        },
        [LS2085A] = {
-               .trans_mode             = DSPI_DMA_MODE,
+               .trans_mode             = DSPI_XSPI_MODE,
                .max_clock_factor       = 8,
                .fifo_size              = 4,
        },
        [LX2160A] = {
-               .trans_mode             = DSPI_DMA_MODE,
+               .trans_mode             = DSPI_XSPI_MODE,
                .max_clock_factor       = 8,
                .fifo_size              = 4,
        },