]> git.proxmox.com Git - mirror_ubuntu-disco-kernel.git/commitdiff
mmc: renesas_sdhi: use extra flag for CBSY usage
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Wed, 9 Aug 2017 19:00:41 +0000 (21:00 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 30 Aug 2017 12:01:58 +0000 (14:01 +0200)
There is one SDHI instance on Gen2 which does not have the CBSY bit.
So, turn CBSY usage into an extra flag and set it accordingly. This has
the additional advantage that we can also set it for other incarnations
later.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Chris Brandt <Chris.Brandt@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/renesas_sdhi_core.c
drivers/mmc/host/renesas_sdhi_internal_dmac.c
drivers/mmc/host/renesas_sdhi_sys_dmac.c
include/linux/mfd/tmio.h

index dd215723fa43128bb3698709c1f7f14d4f68d887..2dea4039c0917f6edb17425a59b1cf7ffad6ddd6 100644 (file)
@@ -429,7 +429,7 @@ static int renesas_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
        case CTL_TRANSACTION_CTL:
        case CTL_DMA_ENABLE:
        case EXT_ACC:
-               if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
+               if (host->pdata->flags & TMIO_MMC_HAVE_CBSY)
                        bit = TMIO_STAT_CMD_BUSY;
                /* fallthrough */
        case CTL_SD_CARD_CLK_CTL:
@@ -588,6 +588,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
        if (ret < 0)
                goto efree;
 
+       /* One Gen2 SDHI incarnation does NOT have a CBSY bit */
+       if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN2_SDR50)
+               mmc_data->flags &= ~TMIO_MMC_HAVE_CBSY;
+
        /* Enable tuning iff we have an SCC and a supported mode */
        if (of_data && of_data->scc_offset &&
            (host->mmc->caps & MMC_CAP_UHS_SDR104 ||
index 3a825774204066b8b2688307b4d4af9b2fc5b8e8..f905f2361d12fa5ee1757b38ddb46eb4e653066b 100644 (file)
@@ -72,7 +72,8 @@ static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
 
 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
        .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
-                         TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
+                         TMIO_MMC_CLK_ACTUAL | TMIO_MMC_HAVE_CBSY |
+                         TMIO_MMC_MIN_RCAR2,
        .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
                          MMC_CAP_CMD23,
        .bus_shift      = 2,
index 718cb8a9d2ce8d94d6e914f3746fd91b1e9ae0d0..9b77f521cd2c2ff456227f634b548ce2048ecbb6 100644 (file)
@@ -58,7 +58,8 @@ static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
 
 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
        .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
-                         TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
+                         TMIO_MMC_CLK_ACTUAL | TMIO_MMC_HAVE_CBSY |
+                         TMIO_MMC_MIN_RCAR2,
        .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
                          MMC_CAP_CMD23,
        .dma_buswidth   = DMA_SLAVE_BUSWIDTH_4_BYTES,
@@ -78,7 +79,8 @@ static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
 
 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
        .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
-                         TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
+                         TMIO_MMC_CLK_ACTUAL | TMIO_MMC_HAVE_CBSY |
+                         TMIO_MMC_MIN_RCAR2,
        .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
                          MMC_CAP_CMD23,
        .bus_shift      = 2,
index 18b17a39d465ed625b30e08748b8f46f995f3c2c..b572955e6de6ab9d50cd8701a2a0a1a6eeac0c7a 100644 (file)
  */
 #define TMIO_MMC_CLK_ACTUAL            BIT(10)
 
+/* Some controllers have a CBSY bit */
+#define TMIO_MMC_HAVE_CBSY             BIT(11)
+
 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);