]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commitdiff
ASoC: msm8916-wcd-digital: Reset RX interpolation path after use
authorStephan Gerhold <stephan@gerhold.net>
Sun, 5 Jan 2020 10:27:53 +0000 (11:27 +0100)
committerKhalid Elmously <khalid.elmously@canonical.com>
Fri, 14 Feb 2020 06:00:53 +0000 (01:00 -0500)
BugLink: https://bugs.launchpad.net/bugs/1862429
commit 85578bbd642f65065039b1765ebe1a867d5435b0 upstream.

For some reason, attempting to route audio through QDSP6 on MSM8916
causes the RX interpolation path to get "stuck" after playing audio
a few times. In this situation, the analog codec part is still working,
but the RX path in the digital codec stops working, so you only hear
the analog parts powering up. After a reboot everything works again.

So far I was not able to reproduce the problem when using lpass-cpu.

The downstream kernel driver avoids this by resetting the RX
interpolation path after use. In mainline we do something similar
for the TX decimator (LPASS_CDC_CLK_TX_RESET_B1_CTL), but the
interpolator reset (LPASS_CDC_CLK_RX_RESET_CTL) got lost when the
msm8916-wcd driver was split into analog and digital.

Fix this problem by adding the reset to
msm8916_wcd_digital_enable_interpolator().

Fixes: 150db8c5afa1 ("ASoC: codecs: Add msm8916-wcd digital codec")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200105102753.83108-1-stephan@gerhold.net
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Khalid Elmously <khalid.elmously@canonical.com>
sound/soc/codecs/msm8916-wcd-digital.c

index 5963d170df4329e4cfae429d2f7df3b68c72e95f..a7d2d6bca32050b9b7310b70ecf349bea7c988c3 100644 (file)
@@ -586,6 +586,12 @@ static int msm8916_wcd_digital_enable_interpolator(
                snd_soc_component_write(component, rx_gain_reg[w->shift],
                              snd_soc_component_read32(component, rx_gain_reg[w->shift]));
                break;
+       case SND_SOC_DAPM_POST_PMD:
+               snd_soc_component_update_bits(component, LPASS_CDC_CLK_RX_RESET_CTL,
+                                             1 << w->shift, 1 << w->shift);
+               snd_soc_component_update_bits(component, LPASS_CDC_CLK_RX_RESET_CTL,
+                                             1 << w->shift, 0x0);
+               break;
        }
        return 0;
 }