i40e: fix write-back-on-itr to work with legacy itr

BugLink: http://bugs.launchpad.net/bugs/1547674
We were not doing write-back on interrupt throttle for Legacy case in X722.
This patch fixes that, so we do WB_ON_ITR for Legacy as well. Plus the issue
that we should still be setting NO_ITR if we are touching the DYN_CTLN register
since we do not want to change ITR setting here.

Change-ID: I5db8491ee1544118a389db839cecc93e1bbc480e
Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
(cherry picked from net-next commit a3d772a3925d85721ad8518db14603fb1cd99295)
Signed-off-by: Tim Gardner <tim.gardner@canonical.com>

diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
index f5b09f4a1cdae3dd541a1dfaf4a142eeb8766726..a5df4351dfbbaaeee7c695a3067e6e433912a0cf 100644 (file)
--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
@@ -789,12 +789,20 @@ void i40e_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)
                if (q_vector->arm_wb_state)
                        return;
 
-               val = I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK;
+               if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
+                       val = I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK |
+                             I40E_PFINT_DYN_CTLN_ITR_INDX_MASK; /* set noitr */
+
+                       wr32(&vsi->back->hw,
+                            I40E_PFINT_DYN_CTLN(q_vector->v_idx +
+                                                vsi->base_vector - 1),
+                            val);
+               } else {
+                       val = I40E_PFINT_DYN_CTL0_WB_ON_ITR_MASK |
+                             I40E_PFINT_DYN_CTL0_ITR_INDX_MASK; /* set noitr */
 
-               wr32(&vsi->back->hw,
-                    I40E_PFINT_DYN_CTLN(q_vector->v_idx +
-                                        vsi->base_vector - 1),
-                    val);
+                       wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, val);
+               }
                q_vector->arm_wb_state = true;
        } else if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
                u32 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |

diff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
index 063f670fb44f326eb3b98b93b151e5deb874e839..1f9da366a51d94db1a6086f707088b183697940f 100644 (file)
--- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
@@ -307,7 +307,8 @@ static void i40evf_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector
                if (q_vector->arm_wb_state)
                        return;
 
-               val = I40E_VFINT_DYN_CTLN1_WB_ON_ITR_MASK;
+               val = I40E_VFINT_DYN_CTLN1_WB_ON_ITR_MASK |
+                     I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK; /* set noitr */
 
                wr32(&vsi->back->hw,
                     I40E_VFINT_DYN_CTLN1(q_vector->v_idx +